summaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/qcom/monaco-pmics.dtsi
blob: 6e096b9b7546a84c80750fce2a029ecf70a9adce (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <dt-bindings/input/input.h>
#include <dt-bindings/spmi/spmi.h>
#include "qcom-adc5-gen3.h"

&spmi_bus {
	pmm8620au_0: pmic@0 {
		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
		reg = <0x0 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pmm8620au_0_rtc: rtc@6100 {
			compatible = "qcom,pmk8350-rtc";
			reg = <0x6100>, <0x6200>;
			reg-names = "rtc", "alarm";
			interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
		};

		pmm8620au_0_adc: adc@8000 {
			compatible = "qcom,spmi-adc5-gen3";
			reg = <0x8000>;
			interrupts-extended = <&spmi_bus 0x0 0x80 0x1 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;
			#io-channel-cells = <1>;

			channel@3 {
				reg = <ADC5_GEN3_DIE_TEMP(0)>;
				label = "pmm8620au_0_die_temp";
				qcom,pre-scaling = <1 1>;
			};

			channel@8e {
				reg = <ADC5_GEN3_VPH_PWR(0)>;
				label = "pmm8620au_0_vph_pwr";
				qcom,pre-scaling = <1 3>;
			};
		};

		pmm8620au_0_gpios: gpio@8800 {
			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
			reg = <0x8800>;
			gpio-controller;
			gpio-ranges = <&pmm8620au_0_gpios 0 0 12>;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};

	pmm8650au_1: pmic@2 {
		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
		reg = <0x2 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pmm8650au_1_adc: adc@8000 {
			compatible = "qcom,spmi-adc5-gen3";
			reg = <0x8000>;
			interrupts-extended = <&spmi_bus 0x2 0x80 0x1 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;
			#io-channel-cells = <1>;

			channel@203 {
				reg = <ADC5_GEN3_DIE_TEMP(2)>;
				label = "pmm8650au_1_die_temp";
				qcom,pre-scaling = <1 1>;
			};

			channel@28e {
				reg = <ADC5_GEN3_VPH_PWR(2)>;
				label = "pmm8650au_1_vph_pwr";
				qcom,pre-scaling = <1 3>;
			};
		};

		pmm8650au_1_gpios: gpio@8800 {
			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
			reg = <0x8800>;
			gpio-controller;
			gpio-ranges = <&pmm8650au_1_gpios 0 0 12>;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};
};