// SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include #include "qcom-adc5-gen3.h" &spmi_bus { pmm8620au_0: pmic@0 { compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; reg = <0x0 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; pmm8620au_0_rtc: rtc@6100 { compatible = "qcom,pmk8350-rtc"; reg = <0x6100>, <0x6200>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; }; pmm8620au_0_adc: adc@8000 { compatible = "qcom,spmi-adc5-gen3"; reg = <0x8000>; interrupts-extended = <&spmi_bus 0x0 0x80 0x1 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; #io-channel-cells = <1>; channel@3 { reg = ; label = "pmm8620au_0_die_temp"; qcom,pre-scaling = <1 1>; }; channel@8e { reg = ; label = "pmm8620au_0_vph_pwr"; qcom,pre-scaling = <1 3>; }; }; pmm8620au_0_gpios: gpio@8800 { compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; gpio-ranges = <&pmm8620au_0_gpios 0 0 12>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; }; pmm8650au_1: pmic@2 { compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; reg = <0x2 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; pmm8650au_1_adc: adc@8000 { compatible = "qcom,spmi-adc5-gen3"; reg = <0x8000>; interrupts-extended = <&spmi_bus 0x2 0x80 0x1 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; #io-channel-cells = <1>; channel@203 { reg = ; label = "pmm8650au_1_die_temp"; qcom,pre-scaling = <1 1>; }; channel@28e { reg = ; label = "pmm8650au_1_vph_pwr"; qcom,pre-scaling = <1 3>; }; }; pmm8650au_1_gpios: gpio@8800 { compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; gpio-ranges = <&pmm8650au_1_gpios 0 0 12>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; }; };