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| author | Zeng Chi <zengchi@kylinos.cn> | 2026-09-21 18:24:42 +0800 |
|---|---|---|
| committer | Sean Christopherson <seanjc@google.com> | 2026-09-22 08:36:16 -0700 |
| commit | 119e9db233ad0f4cbd4cfb9f9385a7bca378b37d (patch) | |
| tree | 660d50d4139cb750fbde1ae3432452c20726c99d /include/asm-generic/bitops/lock.h | |
| download | linux-stable-119e9db233ad0f4cbd4cfb9f9385a7bca378b37d.tar.gz linux-stable-119e9db233ad0f4cbd4cfb9f9385a7bca378b37d.zip | |
KVM: Don't pre-reserve xarray entries when storing empty/NULL attributesgrafted
Skip the xarray reservation loop when clearing all memory attributes, as
storing NULL only erases the entry and never needs to allocate, so no
reservation (and no cleanup of a failed one) is required in that case.
Suggested-by: Sean Christopherson <seanjc@google.com>
Cc: David Ballesteros <davimaba.v@proton.me>
Signed-off-by: Zeng Chi <zengchi@kylinos.cn>
Link: https://patch.msgid.link/20260921102442.1232375-1-zeng_chi911@163.com
[sean: split to separate patch]
Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'include/asm-generic/bitops/lock.h')
| -rw-r--r-- | include/asm-generic/bitops/lock.h | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/include/asm-generic/bitops/lock.h b/include/asm-generic/bitops/lock.h new file mode 100644 index 000000000..ffb73b612 --- /dev/null +++ b/include/asm-generic/bitops/lock.h @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_GENERIC_BITOPS_LOCK_H_ +#define _ASM_GENERIC_BITOPS_LOCK_H_ + +#include <linux/atomic.h> +#include <linux/compiler.h> +#include <asm/barrier.h> + +/** + * arch_test_and_set_bit_lock - Set a bit and return its old value, for lock + * @nr: Bit to set + * @addr: Address to count from + * + * This operation is atomic and provides acquire barrier semantics if + * the returned value is 0. + * It can be used to implement bit locks. + */ +static __always_inline int +arch_test_and_set_bit_lock(unsigned int nr, volatile unsigned long *addr) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + addr += BIT_WORD(nr); + if (READ_ONCE(*addr) & mask) + return 1; + + old = raw_atomic_long_fetch_or_acquire(mask, (atomic_long_t *)addr); + return !!(old & mask); +} + + +/** + * arch_clear_bit_unlock - Clear a bit in memory, for unlock + * @nr: the bit to set + * @addr: the address to start counting from + * + * This operation is atomic and provides release barrier semantics. + */ +static __always_inline void +arch_clear_bit_unlock(unsigned int nr, volatile unsigned long *addr) +{ + addr += BIT_WORD(nr); + raw_atomic_long_fetch_andnot_release(BIT_MASK(nr), (atomic_long_t *)addr); +} + +/** + * arch___clear_bit_unlock - Clear a bit in memory, for unlock + * @nr: the bit to set + * @addr: the address to start counting from + * + * A weaker form of clear_bit_unlock() as used by __bit_lock_unlock(). If all + * the bits in the word are protected by this lock some archs can use weaker + * ops to safely unlock. + * + * See for example x86's implementation. + */ +static inline void +arch___clear_bit_unlock(unsigned int nr, volatile unsigned long *addr) +{ + unsigned long old; + + addr += BIT_WORD(nr); + old = READ_ONCE(*addr); + old &= ~BIT_MASK(nr); + raw_atomic_long_set_release((atomic_long_t *)addr, old); +} + +#ifndef arch_xor_unlock_is_negative_byte +static inline bool arch_xor_unlock_is_negative_byte(unsigned long mask, + volatile unsigned long *p) +{ + long old; + + old = raw_atomic_long_fetch_xor_release(mask, (atomic_long_t *)p); + return !!(old & BIT(7)); +} +#endif + +#include <asm-generic/bitops/instrumented-lock.h> + +#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */ |
