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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MAILI_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_MAILI_H
#define MASTER_QSPI_0 0
#define MASTER_QUP_2 1
#define MASTER_QUP_3 2
#define MASTER_QUP_4 3
#define MASTER_QUP_5 4
#define MASTER_CRYPTO 5
#define MASTER_IPA 6
#define MASTER_QUP_1 7
#define MASTER_SOCCP_PROC 8
#define MASTER_QDSS_ETR 9
#define MASTER_QDSS_ETR_1 10
#define MASTER_SDCC_2 11
#define MASTER_SDCC_4 12
#define MASTER_UFS_MEM 13
#define MASTER_USB3 14
#define SLAVE_A1NOC_SNOC 15
#define MASTER_DDR_EFF_VETO 0
#define MASTER_QUP_CORE_0 1
#define MASTER_QUP_CORE_1 2
#define MASTER_QUP_CORE_2 3
#define MASTER_QUP_CORE_3 4
#define MASTER_QUP_CORE_4 5
#define MASTER_QUP_CORE_5 6
#define SLAVE_DDR_EFF_VETO 7
#define SLAVE_QUP_CORE_0 8
#define SLAVE_QUP_CORE_1 9
#define SLAVE_QUP_CORE_2 10
#define SLAVE_QUP_CORE_3 11
#define SLAVE_QUP_CORE_4 12
#define SLAVE_QUP_CORE_5 13
#define MASTER_GEM_NOC_CNOC 0
#define MASTER_GEM_NOC_PCIE_SNOC 1
#define SLAVE_AOSS 2
#define SLAVE_IPA_CFG 3
#define SLAVE_IPC_ROUTER_FENCE 4
#define SLAVE_SOCCP 5
#define SLAVE_TME_CFG 6
#define SLAVE_CNOC_CFG 7
#define SLAVE_DDRSS_CFG 8
#define SLAVE_IMEM 9
#define SLAVE_PCIE_0 10
#define SLAVE_PCIE_1 11
#define MASTER_GIC 0
#define MASTER_GPU_TCU 1
#define MASTER_SYS_TCU 2
#define MASTER_APPSS_PROC 3
#define MASTER_GFX3D 4
#define MASTER_LPASS_GEM_NOC 5
#define MASTER_MSS_PROC 6
#define MASTER_MNOC_HF_MEM_NOC 7
#define MASTER_MNOC_SF_MEM_NOC 8
#define MASTER_COMPUTE_NOC 9
#define MASTER_ANOC_PCIE_GEM_NOC 10
#define MASTER_QPACE 11
#define MASTER_SNOC_SF_MEM_NOC 12
#define MASTER_WLAN_Q6 13
#define SLAVE_GEM_NOC_CNOC 14
#define SLAVE_LLCC 15
#define SLAVE_MEM_NOC_PCIE_SNOC 16
#define MASTER_LPIAON_NOC_LLCLPI_NOC 0
#define SLAVE_LPASS_LPI_CC 1
#define SLAVE_LLCC_ISLAND 2
#define SLAVE_SERVICE_LLCLPI_NOC 3
#define SLAVE_SERVICE_LLCLPI_NOC_CHIPCX 4
#define MASTER_LPIAON_NOC 0
#define SLAVE_LPASS_GEM_NOC 1
#define MASTER_LPASS_LPINOC 0
#define SLAVE_LPIAON_NOC_LLCLPI_NOC 1
#define SLAVE_LPIAON_NOC_LPASS_AG_NOC 2
#define MASTER_LPASS_PROC 0
#define SLAVE_LPICX_NOC_LPIAON_NOC 1
#define MASTER_LLCC 0
#define MASTER_DDR_RT 1
#define SLAVE_EBI1 2
#define SLAVE_DDR_RT 3
#define MASTER_CAMNOC_HF 0
#define MASTER_CAMNOC_NRT_ICP_SF 1
#define MASTER_CAMNOC_RT_CDM_SF 2
#define MASTER_CAMNOC_SF 3
#define MASTER_MDP 4
#define MASTER_MDSS_DCP 5
#define MASTER_CDSP_HCP 6
#define MASTER_VIDEO_CV_PROC 7
#define MASTER_VIDEO_EVA 8
#define MASTER_VIDEO_MVP 9
#define MASTER_VIDEO_V_PROC 10
#define SLAVE_MNOC_HF_MEM_NOC 11
#define SLAVE_MNOC_SF_MEM_NOC 12
#define MASTER_CDSP_PROC 0
#define SLAVE_CDSP_MEM_NOC 1
#define MASTER_PCIE_ANOC_CFG 0
#define MASTER_PCIE_0 1
#define MASTER_PCIE_1 2
#define SLAVE_ANOC_PCIE_GEM_NOC 3
#define SLAVE_SERVICE_PCIE_ANOC 4
#define MASTER_CFG_CENTER 0
#define MASTER_CFG_EAST 1
#define MASTER_CFG_MM_HF 2
#define MASTER_CFG_MM_SF 3
#define MASTER_CFG_NORTH 4
#define MASTER_CFG_SOUTH 5
#define MASTER_CFG_WEST 6
#define SLAVE_AHB2PHY_SOUTH 7
#define SLAVE_BOOT_ROM 8
#define SLAVE_CAMERA_CFG 9
#define SLAVE_CLK_CTL 10
#define SLAVE_CRYPTO_CFG 11
#define SLAVE_DISPLAY_CFG 12
#define SLAVE_EVA_CFG 13
#define SLAVE_GFX3D_CFG 14
#define SLAVE_I2C 15
#define SLAVE_IMEM_CFG 16
#define SLAVE_IPC_ROUTER_CFG 17
#define SLAVE_IRIS_CFG 18
#define SLAVE_CNOC_MSS 19
#define SLAVE_PCIE_0_CFG 20
#define SLAVE_PCIE_1_CFG 21
#define SLAVE_PRNG 22
#define SLAVE_QSPI_0 23
#define SLAVE_QUP_1 24
#define SLAVE_QUP_2 25
#define SLAVE_QUP_3 26
#define SLAVE_QUP_4 27
#define SLAVE_QUP_5 28
#define SLAVE_SDCC_2 29
#define SLAVE_SDCC_4 30
#define SLAVE_TLMM 31
#define SLAVE_UFS_MEM_CFG 32
#define SLAVE_USB3 33
#define SLAVE_VSENSE_CTRL_CFG 34
#define SLAVE_PCIE_ANOC_CFG 35
#define SLAVE_QDSS_CFG 36
#define SLAVE_QDSS_STM 37
#define SLAVE_TCSR 38
#define SLAVE_TCU 39
#define MASTER_CNOC_STARDUST 0
#define SLAVE_STARDUST_CENTER_CFG 1
#define SLAVE_STARDUST_EAST_CFG 2
#define SLAVE_STARDUST_MM_HF_CFG 3
#define SLAVE_STARDUST_MM_SF_CFG 4
#define SLAVE_STARDUST_NORTH_CFG 5
#define SLAVE_STARDUST_SOUTH_CFG 6
#define SLAVE_STARDUST_WEST_CFG 7
#define MASTER_A1NOC_SNOC 0
#define MASTER_APSS_NOC 1
#define MASTER_CNOC_SNOC 2
#define SLAVE_SNOC_GEM_NOC_SF 3
#endif
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