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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_CAM_BIST_MCLK_CC_KAANAPALI_H
#define _DT_BINDINGS_CLK_QCOM_CAM_BIST_MCLK_CC_KAANAPALI_H
/* CAM_BIST_MCLK_CC clocks */
#define CAM_BIST_MCLK_CC_DEBUG_CLK 0
#define CAM_BIST_MCLK_CC_DEBUG_DIV_CLK_SRC 1
#define CAM_BIST_MCLK_CC_MCLK0_CLK 2
#define CAM_BIST_MCLK_CC_MCLK0_CLK_SRC 3
#define CAM_BIST_MCLK_CC_MCLK1_CLK 4
#define CAM_BIST_MCLK_CC_MCLK1_CLK_SRC 5
#define CAM_BIST_MCLK_CC_MCLK2_CLK 6
#define CAM_BIST_MCLK_CC_MCLK2_CLK_SRC 7
#define CAM_BIST_MCLK_CC_MCLK3_CLK 8
#define CAM_BIST_MCLK_CC_MCLK3_CLK_SRC 9
#define CAM_BIST_MCLK_CC_MCLK4_CLK 10
#define CAM_BIST_MCLK_CC_MCLK4_CLK_SRC 11
#define CAM_BIST_MCLK_CC_MCLK5_CLK 12
#define CAM_BIST_MCLK_CC_MCLK5_CLK_SRC 13
#define CAM_BIST_MCLK_CC_MCLK6_CLK 14
#define CAM_BIST_MCLK_CC_MCLK6_CLK_SRC 15
#define CAM_BIST_MCLK_CC_MCLK7_CLK 16
#define CAM_BIST_MCLK_CC_MCLK7_CLK_SRC 17
#define CAM_BIST_MCLK_CC_PLL0 18
#define CAM_BIST_MCLK_CC_PLL_TEST_CLK 19
#define CAM_BIST_MCLK_CC_PLL_TEST_DIV_CLK_SRC 20
#define CAM_BIST_MCLK_CC_SLEEP_CLK 21
#endif
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