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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#ifndef QCOM_PHY_QMP_PCS_V10_60_H_
#define QCOM_PHY_QMP_PCS_V10_60_H_
/* Only for QMP V10_60 PHY - PCIe PCS registers */
#define QPHY_V10_60_PCS_SW_RESET 0x000
#define QPHY_V10_60_PCS_PCS_STATUS1 0x014
#define QPHY_V10_60_PCS_POWER_DOWN_CONTROL 0x040
#define QPHY_V10_60_PCS_START_CONTROL 0x044
#define QPHY_V10_60_PCS_G12S1_TXDEEMPH_M6DB 0x170
#define QPHY_V10_60_PCS_G3S2_PRE_GAIN 0x178
#define QPHY_V10_60_PCS_RX_SIGDET_LVL 0x190
#define QPHY_V10_60_PCS_ELECIDLE_DLY_SEL 0x1b8
#define QPHY_V10_60_PCS_PCS_TX_RX_CONFIG1 0x1dc
#define QPHY_V10_60_PCS_PCS_TX_RX_CONFIG2 0x1e0
#define QPHY_V10_60_PCS_EQ_CONFIG4 0x1f8
#define QPHY_V10_60_PCS_EQ_CONFIG5 0x1fc
#endif
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