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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#ifndef QCOM_PHY_QMP_PCS_PCIE_V10_H_
#define QCOM_PHY_QMP_PCS_PCIE_V10_H_
/* Only for QMP V10 PHY - PCIE PCS registers */
#define QPHY_PCIE_V10_PCS_POWER_STATE_CONFIG2 0x00c
#define QPHY_PCIE_V10_PCS_POWER_STATE_CONFIG4 0x014
#define QPHY_PCIE_V10_PCS_ENDPOINT_REFCLK_DRIVE 0x020
#define QPHY_PCIE_V10_PCS_OSC_DTCT_ACTIONS 0x094
#define QPHY_PCIE_V10_PCS_EQ_CONFIG1 0x0a4
#define QPHY_PCIE_V10_PCS_RXEQEVAL_TIME 0x0f4
#define QPHY_PCIE_V10_PCS_POWER_STATE_CONFIG6 0x0f8
#endif
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