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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/eswin,eic7700-usb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ESWIN EIC7700 SoC Usb Controller
maintainers:
- Wei Yang <yangwei1@eswincomputing.com>
- Senchuan Zhang <zhangsenchuan@eswincomputing.com>
- Hang Cao <caohang@eswincomputing.com>
description:
The Usb controller on EIC7700 SoC.
allOf:
- $ref: snps,dwc3-common.yaml#
properties:
compatible:
const: eswin,eic7700-dwc3
reg:
maxItems: 1
interrupts:
maxItems: 1
interrupt-names:
items:
- const: peripheral
clocks:
maxItems: 3
clock-names:
items:
- const: aclk
- const: cfg
- const: usb_en
resets:
maxItems: 3
reset-names:
items:
- const: vaux
- const: usb_rst
- const: usb_phy
eswin,hsp-sp-csr:
description:
HSP CSR is to control and get status of different high-speed peripherals
(such as Ethernet, USB, SATA, etc.) via register, which can tune
board-level's parameters of PHY, etc.
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to HSP Register Controller hsp_sp_csr node.
- description: USB bus register offset.
- description: AXI low power register offset.
required:
- compatible
- reg
- clocks
- clock-names
- interrupts
- interrupt-names
- resets
- reset-names
- eswin,hsp-sp-csr
unevaluatedProperties: false
examples:
- |
usb@50480000 {
compatible = "eswin,eic7700-dwc3";
reg = <0x50480000 0x10000>;
clocks = <&clock 135>,
<&clock 136>,
<&hspcrg 18>;
clock-names = "aclk", "cfg", "usb_en";
interrupt-parent = <&plic>;
interrupts = <85>;
interrupt-names = "peripheral";
resets = <&reset 84>, <&hspcrg 2>, <&hspcrg 4>;
reset-names = "vaux", "usb_rst", "usb_phy";
dr_mode = "peripheral";
maximum-speed = "high-speed";
phy_type = "utmi";
eswin,hsp-sp-csr = <&hsp_sp_csr 0x800 0x818>;
};
|
