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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/spacemit,k1-spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SpacemiT K1 SoC Serial Peripheral Interface (SPI)
maintainers:
- Alex Elder <elder@kernel.org>
description:
The SpacemiT K1 SoC implements a SPI controller that has two 32-entry
FIFOs, for transmit and receive. Details are currently available in
section 18.2.1 of the K1 User Manual, found in the SpacemiT Keystone
K1 Documentation[1]. The controller transfers words using PIO. DMA
transfers are supported as well, if both TX and RX DMA channels are
specified,
[1] https://developer.spacemit.com/documentation
allOf:
- $ref: /schemas/spi/spi-controller.yaml#
properties:
compatible:
oneOf:
- const: spacemit,k1-spi
- items:
- const: spacemit,k3-spi
- const: spacemit,k1-spi
reg:
maxItems: 1
clocks:
items:
- description: Core clock
- description: Bus clock
clock-names:
items:
- const: core
- const: bus
resets:
maxItems: 1
interrupts:
maxItems: 1
dmas:
items:
- description: RX DMA channel
- description: TX DMA channel
dma-names:
items:
- const: rx
- const: tx
required:
- compatible
- reg
- clocks
- clock-names
- resets
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/spacemit,k1-syscon.h>
spi@d401c000 {
compatible = "spacemit,k1-spi";
reg = <0xd401c000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&syscon_apbc CLK_SSP3>,
<&syscon_apbc CLK_SSP3_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_SSP3>;
interrupts = <55>;
dmas = <&pdma 20>, <&pdma 19>;
dma-names = "rx", "tx";
};
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