blob: be258c1f36b1953b6329dc50f7bc8c55fc25cd7e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/axiado,ax3000-spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Axiado AX3000 SoC SPI controller
maintainers:
- Vladimir Moravcevic <vmoravcevic@axiado.com>
- Tzu-Hao Wei <twei@axiado.com>
- Swark Yang <syang@axiado.com>
- Prasad Bolisetty <pbolisetty@axiado.com>
allOf:
- $ref: spi-controller.yaml#
properties:
compatible:
enum:
- axiado,ax3000-spi
reg:
maxItems: 1
interrupts:
maxItems: 1
clock-names:
items:
- const: ref
- const: pclk
clocks:
maxItems: 2
num-cs:
description: |
Number of chip selects used.
minimum: 1
maximum: 4
default: 4
required:
- compatible
- reg
- interrupts
- clock-names
- clocks
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
spi@80510000 {
compatible = "axiado,ax3000-spi";
reg = <0x00 0x80510000 0x00 0x1000>;
clock-names = "ref", "pclk";
clocks = <&spi_clk>, <&apb_pclk>;
interrupt-parent = <&gic500>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
num-cs = <4>;
};
};
...
|