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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/amd,bram-rproc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: AMD MicroBlaze/V BRAM-based Remote Processor
maintainers:
- Ben Levinsky <ben.levinsky@amd.com>
description: |
Soft-core processor subsystem instantiated in AMD programmable logic and
using dual-port BRAM for firmware storage and execution.
Hardware Architecture:
Host (PS) Programmable Logic (PL)
========= ======================
AXI Interface -----------------> AXI BRAM Controller (Host Port)
|
| Port A
v
+-----------------+
| Dual-Port BRAM |
| (shared memory) |
+-----------------+
^
| Port B
|
AXI BRAM Controller (Soft-core Port)
^
| LMB
|
Soft-core CPU (MicroBlaze/V)
GPIO --------------------------> Proc Sys Reset ----> CPU Reset Signal
Clock -------------------------> Clock Distribution -> CPU Clock
Memory Architecture:
The dual-port BRAM allows simultaneous access from both processors:
- Port A: Connected to the host AXI BRAM controller for firmware loading
- Port B: Connected to the soft-core local memory bus for execution
The reg property describes the executable BRAM window in the processor-local
address space. The parent bus node translates that window to the system
physical address space by using standard devicetree address translation
through ranges. A clock input and a reset GPIO control the subsystem.
properties:
compatible:
oneOf:
- const: xlnx,zynqmp-bram-rproc
- items:
- enum:
- amd,versal2-bram-rproc
- xlnx,versal-bram-rproc
- xlnx,versal-net-bram-rproc
- const: xlnx,zynqmp-bram-rproc
reg:
maxItems: 1
description:
Processor-local address and size of the BRAM firmware memory window,
as seen by the soft-core processor (typically 0x0 for reset vector).
The parent bus ranges property must translate this window to the
corresponding system physical address.
clocks:
maxItems: 1
description:
Clock input for the soft-core processor subsystem.
firmware-name:
maxItems: 1
description:
Name of the firmware ELF file to load.
reset-gpios:
maxItems: 1
description:
GPIO specifier controlling the soft-core reset input.
required:
- compatible
- reg
- clocks
- reset-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
remoteproc@0 {
compatible = "xlnx,zynqmp-bram-rproc";
reg = <0x0 0x40000>;
clocks = <&pl_clk>;
firmware-name = "firmware.elf";
reset-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
};
...
|
