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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8189-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek MT8189 Pin Controller
maintainers:
- Lei Xue <lei.xue@mediatek.com>
- Cathy Xu <ot_cathy.xu@mediatek.com>
description:
The MediaTek's MT8189 Pin controller is used to control SoC pins.
properties:
compatible:
const: mediatek,mt8189-pinctrl
reg:
items:
- description: gpio base
- description: lm group IO
- description: rb0 group IO
- description: rb1 group IO
- description: bm0 group IO
- description: bm1 group IO
- description: bm2 group IO
- description: lt0 group IO
- description: lt1 group IO
- description: rt group IO
- description: eint0 group IO
- description: eint1 group IO
- description: eint2 group IO
- description: eint3 group IO
- description: eint4 group IO
reg-names:
items:
- const: base
- const: lm
- const: rb0
- const: rb1
- const: bm0
- const: bm1
- const: bm2
- const: lt0
- const: lt1
- const: rt
- const: eint0
- const: eint1
- const: eint2
- const: eint3
- const: eint4
interrupts:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
const: 2
gpio-controller: true
'#gpio-cells':
const: 2
gpio-ranges:
maxItems: 1
gpio-line-names: true
# PIN CONFIGURATION NODES
patternProperties:
'-pins$':
type: object
additionalProperties: false
patternProperties:
'^pins':
type: object
$ref: /schemas/pinctrl/pincfg-node.yaml
additionalProperties: false
description:
A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input
schmitt.
properties:
pinmux:
description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in arch/arm64/boot/dts/mediatek/mt8189-pinfunc.h
directly, for this SoC.
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
bias-pull-down:
oneOf:
- type: boolean
- enum: [100, 101, 102, 103]
description: mt8189 pull down PUPD/R0/R1 type define value.
- enum: [75000, 5000]
description: mt8189 pull down RSEL type si unit value(ohm).
description: |
For pull down type is normal, it doesn't need add R1R0 define
and resistance value.
For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
"MTK_PUPD_SET_R1R0_11" define in mt8189.
For pull down type is PD/RSEL, it can add resistance value(ohm)
to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit".
bias-pull-up:
oneOf:
- type: boolean
- enum: [100, 101, 102, 103]
description: mt8189 pull up PUPD/R0/R1 type define value.
- enum: [1000, 1500, 2000, 3000, 4000, 5000, 75000]
description: mt8189 pull up RSEL type si unit value(ohm).
description: |
For pull up type is normal, it don't need add R1R0 define
and resistance value.
For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
"MTK_PUPD_SET_R1R0_11" define in mt8189.
For pull up type is PU/RSEL, it can add resistance value(ohm)
to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit".
bias-disable: true
output-high: true
output-low: true
input-enable: true
input-disable: true
input-schmitt-enable: true
input-schmitt-disable: true
required:
- pinmux
required:
- compatible
- reg
- interrupts
- interrupt-controller
- '#interrupt-cells'
- gpio-controller
- '#gpio-cells'
- gpio-ranges
additionalProperties: false
examples:
- |
#include <dt-bindings/pinctrl/mt65xx.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#define PINMUX_GPIO51__FUNC_SCL0 (MTK_PIN_NO(51) | 2)
#define PINMUX_GPIO52__FUNC_SDA0 (MTK_PIN_NO(52) | 2)
pio: pinctrl@10005000 {
compatible = "mediatek,mt8189-pinctrl";
reg = <0x10005000 0x1000>,
<0x11b50000 0x1000>,
<0x11c50000 0x1000>,
<0x11c60000 0x1000>,
<0x11d20000 0x1000>,
<0x11d30000 0x1000>,
<0x11d40000 0x1000>,
<0x11e20000 0x1000>,
<0x11e30000 0x1000>,
<0x11f20000 0x1000>,
<0x11ce0000 0x1000>,
<0x11de0000 0x1000>,
<0x11e60000 0x1000>,
<0x1c01e000 0x1000>,
<0x11f00000 0x1000>;
reg-names = "base", "lm", "rb0", "rb1", "bm0" , "bm1",
"bm2", "lt0", "lt1", "rt", "eint0", "eint1",
"eint2", "eint3", "eint4";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pio 0 0 182>;
interrupt-controller;
interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH 0>;
#interrupt-cells = <2>;
i2c0-pins {
pins {
pinmux = <PINMUX_GPIO51__FUNC_SCL0>,
<PINMUX_GPIO52__FUNC_SDA0>;
bias-disable;
};
};
};
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