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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/cix,sky1-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Cix Sky1 Soc Pin Controller
maintainers:
- Gary Yang <gary.yang@cixtech.com>
description:
The pin-controller is used to control Soc pins. There are two pin-controllers
on Cix Sky1 platform. one is used under S0 state, the other one is used under
S0 and S5 state.
properties:
compatible:
enum:
- cix,sky1-pinctrl
- cix,sky1-pinctrl-s5
reg:
items:
- description: gpio base
patternProperties:
'-cfg$':
type: object
additionalProperties: false
description:
A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine.
patternProperties:
'pins$':
type: object
additionalProperties: false
description:
Each subnode will list the pins it needs, and how they should
be configured, with regard to muxer configuration, bias pull,
and drive strength.
allOf:
- $ref: pincfg-node.yaml#
- $ref: pinmux-node.yaml#
properties:
pinmux:
description:
Values are constructed from pin number and mux setting, pin
number is left shifted by 8 bits, then ORed with mux setting
bias-disable: true
bias-pull-up: true
bias-pull-down: true
drive-strength:
description:
typical current when output high level.
enum: [ 2, 3, 5, 6, 8, 9, 11, 12, 13, 14, 17, 18, 20, 21, 23,
24 ]
required:
- pinmux
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#define CIX_PAD_GPIO012_FUNC_GPIO012 (11 << 8 | 0x0)
pinctrl@4170000 {
compatible = "cix,sky1-pinctrl";
reg = <0x4170000 0x1000>;
wifi_vbat_gpio: wifi-vbat-gpio-cfg {
pins {
pinmux = <CIX_PAD_GPIO012_FUNC_GPIO012>;
bias-pull-up;
drive-strength = <8>;
};
};
};
|
