1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/airoha,en7581-npu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Airoha Network Processor Unit for EN7581 SoC
maintainers:
- Lorenzo Bianconi <lorenzo@kernel.org>
description:
The Airoha Network Processor Unit (NPU) provides a configuration interface
to implement wired and wireless hardware flow offloading programming Packet
Processor Engine (PPE) flow table.
properties:
compatible:
enum:
- airoha,en7581-npu
- airoha,an7583-npu
reg:
maxItems: 1
interrupts:
items:
- description: mbox host irq line
- description: watchdog0 irq line
- description: watchdog1 irq line
- description: watchdog2 irq line
- description: watchdog3 irq line
- description: watchdog4 irq line
- description: watchdog5 irq line
- description: watchdog6 irq line
- description: watchdog7 irq line
- description: wlan irq line0
- description: wlan irq line1
- description: wlan irq line2
- description: wlan irq line3
- description: wlan irq line4
- description: wlan irq line5
memory-region:
items:
- description: NPU firmware binary region
- description: NPU wlan offload RX buffers region
- description: NPU wlan offload TX buffers region
- description: NPU wlan offload TX packet identifiers region
- description: NPU wlan Block Ack buffers region
minItems: 1
memory-region-names:
items:
- const: firmware
- const: pkt
- const: tx-pkt
- const: tx-bufid
- const: ba
minItems: 1
firmware-name:
items:
- description: Firmware name of RiscV core
- description: Firmware name of Data section
required:
- compatible
- reg
- interrupts
- memory-region
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
npu@1e900000 {
compatible = "airoha,en7581-npu";
reg = <0 0x1e900000 0 0x313000>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
memory-region = <&npu_firmware>, <&npu_pkt>, <&npu_txpkt>,
<&npu_txbufid>, <&npu_ba>;
memory-region-names = "firmware", "pkt", "tx-pkt", "tx-bufid", "ba";
firmware-name = "airoha/en7581_npu_rv32.bin",
"airoha/en7581_npu_data.bin";
};
};
|
