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# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys Designware Mobile Storage Host Controller
maintainers:
- Ulf Hansson <ulf.hansson@linaro.org>
- Jisheng Zhang <Jisheng.Zhang@synaptics.com>
properties:
compatible:
oneOf:
- items:
- enum:
- rockchip,rk3528-dwcmshc
- rockchip,rk3562-dwcmshc
- rockchip,rk3576-dwcmshc
- const: rockchip,rk3588-dwcmshc
- items:
- const: sophgo,sg2044-dwcmshc
- const: sophgo,sg2042-dwcmshc
- enum:
- canaan,k230-emmc
- canaan,k230-sdio
- hpe,gsc-dwcmshc
- rockchip,rk3568-dwcmshc
- rockchip,rk3588-dwcmshc
- snps,dwcmshc-sdhci
- sophgo,cv1800b-dwcmshc
- sophgo,sg2002-dwcmshc
- sophgo,sg2042-dwcmshc
- thead,th1520-dwcmshc
- eswin,eic7700-dwcmshc
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 1
maxItems: 5
clock-names:
minItems: 1
maxItems: 5
power-domains:
maxItems: 1
resets:
minItems: 4
maxItems: 5
reset-names:
minItems: 4
maxItems: 5
canaan,usb-phy:
$ref: /schemas/types.yaml#/definitions/phandle
description: Phandle to the Canaan K230 USB PHY node required for
k230-emmc/sdio.
rockchip,txclk-tapnum:
description: Specify the number of delay for tx sampling.
$ref: /schemas/types.yaml#/definitions/uint8
eswin,hsp-sp-csr:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: Phandle to HSP(High-Speed Peripheral) device
- description: Offset of the stability status register for internal
clock.
- description: Offset of the stability register for host regulator
voltage.
description:
HSP CSR is to control and get status of different high-speed peripherals
(such as Ethernet, USB, SATA, etc.) via register, which can tune
board-level's parameters of PHY, etc.
eswin,drive-impedance-ohms:
description: Specifies the drive impedance in Ohm.
enum: [33, 40, 50, 66, 100]
hpe,gxp-sysreg:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to HPE GXP SoC system register block (syscon)
- description: offset of the MSHCCS register within the syscon block
description:
Phandle to the HPE GXP SoC system register block (syscon) and
offset of the MSHCCS register used to configure clock
synchronisation for HS200 tuning.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
allOf:
- $ref: mmc-controller.yaml#
- if:
properties:
compatible:
contains:
enum:
- canaan,k230-emmc
- canaan,k230-sdio
then:
properties:
clocks:
minItems: 5
clock-names:
items:
- const: core
- const: bus
- const: axi
- const: block
- const: timer
required:
- canaan,usb-phy
- if:
properties:
compatible:
contains:
const: hpe,gsc-dwcmshc
then:
properties:
clocks:
items:
- description: core clock
clock-names:
items:
- const: core
required:
- hpe,gxp-sysreg
else:
properties:
hpe,gxp-sysreg: false
- if:
properties:
compatible:
contains:
const: sophgo,sg2042-dwcmshc
then:
properties:
clocks:
items:
- description: core clock
- description: bus clock
- description: timer clock
clock-names:
items:
- const: core
- const: bus
- const: timer
else:
properties:
clocks:
minItems: 1
items:
- description: core clock
- description: bus clock for optional
- description: axi clock for rockchip specified
- description: block clock for rockchip specified
- description: timer clock for rockchip specified
clock-names:
minItems: 1
items:
- const: core
- const: bus
- const: axi
- const: block
- const: timer
- if:
properties:
compatible:
contains:
const: eswin,eic7700-dwcmshc
then:
properties:
resets:
minItems: 4
maxItems: 4
reset-names:
items:
- const: axi
- const: phy
- const: prstn
- const: txrx
required:
- eswin,hsp-sp-csr
- eswin,drive-impedance-ohms
else:
properties:
resets:
minItems: 5
maxItems: 5
reset-names:
items:
- const: core
- const: bus
- const: axi
- const: block
- const: timer
- if:
properties:
compatible:
contains:
const: rockchip,rk3576-dwcmshc
then:
required:
- power-domains
unevaluatedProperties: false
examples:
- |
mmc@fe310000 {
compatible = "rockchip,rk3568-dwcmshc";
reg = <0xfe310000 0x10000>;
interrupts = <0 25 0x4>;
clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>;
clock-names = "core", "bus", "axi", "block", "timer";
bus-width = <8>;
#address-cells = <1>;
#size-cells = <0>;
};
- |
mmc@aa0000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xaa000 0x1000>;
interrupts = <0 25 0x4>;
clocks = <&cru 17>, <&cru 18>;
clock-names = "core", "bus";
bus-width = <8>;
#address-cells = <1>;
#size-cells = <0>;
};
...
|
