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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/ti,j721e-csi2rx-shim.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI J721E CSI2RX Shim
description: |
The TI J721E CSI2RX Shim is a wrapper around Cadence CSI2RX bridge that
enables sending captured frames to memory over PSI-L DMA. In the J721E
Technical Reference Manual (SPRUIL1B) it is referred to as "SHIM" under the
CSI_RX_IF section.
maintainers:
- Jai Luthra <jai.luthra@linux.dev>
properties:
compatible:
const: ti,j721e-csi2rx-shim
dmas:
minItems: 1
maxItems: 32
dma-names:
minItems: 1
items:
- const: rx0
- const: rx1
- const: rx2
- const: rx3
- const: rx4
- const: rx5
- const: rx6
- const: rx7
- const: rx8
- const: rx9
- const: rx10
- const: rx11
- const: rx12
- const: rx13
- const: rx14
- const: rx15
- const: rx16
- const: rx17
- const: rx18
- const: rx19
- const: rx20
- const: rx21
- const: rx22
- const: rx23
- const: rx24
- const: rx25
- const: rx26
- const: rx27
- const: rx28
- const: rx29
- const: rx30
- const: rx31
reg:
maxItems: 1
power-domains:
maxItems: 1
ranges: true
"#address-cells": true
"#size-cells": true
patternProperties:
"^csi-bridge@":
type: object
description: CSI2 bridge node.
$ref: cdns,csi2rx.yaml#
required:
- compatible
- reg
- dmas
- dma-names
- power-domains
- ranges
- "#address-cells"
- "#size-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/soc/ti,sci_pm_domain.h>
ti_csi2rx0: ticsi2rx@4500000 {
compatible = "ti,j721e-csi2rx-shim";
dmas = <&main_udmap 0x4940>, <&main_udmap 0x4941>;
dma-names = "rx0", "rx1";
reg = <0x4500000 0x1000>;
power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
cdns_csi2rx: csi-bridge@4504000 {
compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
reg = <0x4504000 0x1000>;
clocks = <&k3_clks 26 2>, <&k3_clks 26 0>, <&k3_clks 26 2>,
<&k3_clks 26 2>, <&k3_clks 26 3>, <&k3_clks 26 3>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
phys = <&dphy0>;
phy-names = "dphy";
ports {
#address-cells = <1>;
#size-cells = <0>;
csi2_0: port@0 {
reg = <0>;
csi2rx0_in_sensor: endpoint {
remote-endpoint = <&csi2_cam0>;
bus-type = <4>; /* CSI2 DPHY. */
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
};
};
};
|
