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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/rockchip,rv1106-cru.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip RV1106 Clock and Reset Unit
maintainers:
- Simon Glass <sjg@chromium.org>
- Heiko Stuebner <heiko@sntech.de>
description:
The RV1106 clock controller generates the clock and also implements a
reset controller for SoC peripherals.
properties:
compatible:
const: rockchip,rv1106-cru
reg:
maxItems: 1
"#clock-cells":
const: 1
"#reset-cells":
const: 1
clocks:
maxItems: 1
clock-names:
const: xin24m
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the syscon managing the "general register files" (GRF).
If missing, pll rates are not changeable due to the missing pll
lock status, and the MMC drive and sample phase clocks, whose
control registers live in the GRF region, are not registered.
required:
- compatible
- reg
- "#clock-cells"
- "#reset-cells"
additionalProperties: false
examples:
- |
clock-controller@ff3b0000 {
compatible = "rockchip,rv1106-cru";
reg = <0xff3b0000 0x20000>;
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
};
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