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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/st,stm32mp131-dbg-bus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32 Coresight bus
maintainers:
- Gatien Chevallier <gatien.chevallier@foss.st.com>
description:
The STM32 debug bus is in charge of checking the debug configuration
of the platform before probing the peripheral drivers that rely on the debug
domain.
properties:
compatible:
items:
- enum:
- st,stm32mp131-dbg-bus
- st,stm32mp151-dbg-bus
"#address-cells":
const: 1
"#size-cells":
const: 1
ranges:
minItems: 1
maxItems: 2
"#access-controller-cells":
const: 1
description:
Contains the debug profile necessary to access the peripheral.
patternProperties:
"@[0-9a-f]+$":
description: Debug related peripherals
type: object
additionalProperties: true
required:
- access-controllers
required:
- "#access-controller-cells"
- "#address-cells"
- "#size-cells"
- compatible
- ranges
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/stm32mp1-clks.h>
dbg_bus: bus@50080000 {
compatible = "st,stm32mp131-dbg-bus";
#address-cells = <1>;
#size-cells = <1>;
#access-controller-cells = <1>;
ranges = <0x50080000 0x50080000 0x3f80000>;
cti@50094000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x50094000 0x1000>;
clocks = <&rcc CK_DBG>;
clock-names = "apb_pclk";
access-controllers = <&dbg_bus 0>;
};
};
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