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authorTim Chen <tim.c.chen@linux.intel.com>2026-09-21 17:37:22 -0700
committerIngo Molnar <mingo@kernel.org>2026-09-22 10:49:53 +0200
commit0d6526f82c3cdefcca47f73f5fc08dc6f335eac6 (patch)
tree176dc2d685debcfb082c151ee94f2425ac96b364 /tools/perf/util/sample.c
downloadlinux-stable-0d6526f82c3cdefcca47f73f5fc08dc6f335eac6.tar.gz
linux-stable-0d6526f82c3cdefcca47f73f5fc08dc6f335eac6.zip
sched/cache: Keep nr_pref_llc_running in the runnable domain, to fix LLC mis-scheduling buggrafted
alb_break_llc() decides whether to break LLC preference during active load balance. It does so by testing that every runnable fair task on the source rq prefers its LLC: env->src_rq->nr_pref_llc_running == env->src_rq->cfs.h_nr_runnable But the two counters cover different sets. nr_pref_llc_running is updated in account_llc_enqueue()/account_llc_dequeue(), next to cfs_rq->nr_queued, so it follows queued tasks. h_nr_runnable is updated in set_delayed()/ clear_delayed() and drops delay-dequeued tasks. So under DELAY_DEQUEUE, a preferring task that goes to sleep stays counted in nr_pref_llc_running while h_nr_runnable falls. The equality then breaks, alb_break_llc() returns false, and active balance is free to pull a task off its preferred LLC. Active balance only moves runnable tasks, and this is the only LLC check it consults: once the stopper runs, LBF_ACTIVE_LB skips the per-task test in can_migrate_task(). The runnable set is the one we want. Fix it on the counter side. A task should be counted in nr_pref_llc_running exactly while it is both queued on its preferred LLC (pref_llc_queued) and runnable (!sched_delayed). Define that membership once in task_pref_llc_runnable(), and adjust the counter only through pref_llc_running_inc()/pref_llc_running_dec() from the four sites that change either input: account_llc_enqueue(), account_llc_dequeue(), set_delayed() and clear_delayed(). Gating every update on the same predicate keeps the delay, wake and dequeue paths from double-counting or underflowing; see the comments at those sites for the ordering. nr_llc_running and sd->llc_counts are not touched and stay on queued semantics. Fixes: 714059f79ff0 ("sched/cache: Handle moving single tasks to/from their preferred LLC") Closes: https://lore.kernel.org/lkml/20260827135000.735138-1-zhanxusheng@xiaomi.com/ Reported-by: Zhan Xusheng <zhanxusheng@xiaomi.com> Suggested-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Kayra Cizmeci <kayracizmeci@gmail.com> Cc: <stable@kernel.org> # v7.2.x Link: https://patch.msgid.link/06af61afedac32e6477f57feb4d658f6c411c3af.1790035273.git.tim.c.chen@linux.intel.com
Diffstat (limited to 'tools/perf/util/sample.c')
-rw-r--r--tools/perf/util/sample.c134
1 files changed, 134 insertions, 0 deletions
diff --git a/tools/perf/util/sample.c b/tools/perf/util/sample.c
new file mode 100644
index 000000000..bccc19e2a
--- /dev/null
+++ b/tools/perf/util/sample.c
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#include "sample.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <elf.h>
+#include <linux/zalloc.h>
+
+#include "../../arch/x86/include/asm/insn.h"
+#include "debug.h"
+#include "evsel.h"
+#include "thread.h"
+
+#ifndef EM_CSKY
+#define EM_CSKY 252
+#endif
+#ifndef EM_LOONGARCH
+#define EM_LOONGARCH 258
+#endif
+
+void perf_sample__init(struct perf_sample *sample, bool all)
+{
+ if (all) {
+ memset(sample, 0, sizeof(*sample));
+ } else {
+ sample->evsel = NULL;
+ sample->user_regs = NULL;
+ sample->intr_regs = NULL;
+ sample->merged_callchain = false;
+ sample->callchain = NULL;
+ }
+}
+
+void perf_sample__exit(struct perf_sample *sample)
+{
+ evsel__put(sample->evsel);
+ sample->evsel = NULL;
+ zfree(&sample->user_regs);
+ zfree(&sample->intr_regs);
+ if (sample->merged_callchain) {
+ zfree(&sample->callchain);
+ sample->merged_callchain = false;
+ }
+}
+
+struct regs_dump *perf_sample__user_regs(struct perf_sample *sample)
+{
+ if (!sample->user_regs) {
+ sample->user_regs = zalloc(sizeof(*sample->user_regs));
+ if (!sample->user_regs)
+ pr_err("Failure to allocate sample user_regs");
+ }
+ return sample->user_regs;
+}
+
+
+struct regs_dump *perf_sample__intr_regs(struct perf_sample *sample)
+{
+ if (!sample->intr_regs) {
+ sample->intr_regs = zalloc(sizeof(*sample->intr_regs));
+ if (!sample->intr_regs)
+ pr_err("Failure to allocate sample intr_regs");
+ }
+ return sample->intr_regs;
+}
+
+static int elf_machine_max_instruction_length(uint16_t e_machine)
+{
+ switch (e_machine) {
+ /* Fixed 4-byte (32-bit) architectures */
+ case EM_AARCH64:
+ case EM_PPC:
+ case EM_PPC64:
+ case EM_MIPS:
+ case EM_SPARC:
+ case EM_SPARCV9:
+ case EM_ALPHA:
+ case EM_LOONGARCH:
+ case EM_PARISC:
+ case EM_SH:
+ return 4;
+
+ /* Variable length or mixed-mode architectures */
+ case EM_ARM: /* Variable due to Thumb/Thumb-2 */
+ case EM_RISCV: /* Variable due to Compressed (C) extension */
+ case EM_CSKY: /* Variable (16 or 32 bit) */
+ case EM_ARC: /* Variable (ARCompact) */
+ return 4;
+ case EM_S390: /* Variable (2, 4, or 6 bytes) */
+ return 6;
+ case EM_68K:
+ return 10;
+ case EM_386:
+ case EM_X86_64:
+ return 15;
+ case EM_XTENSA: /* Variable (FLIX) */
+ return 16;
+ default:
+ return MAX_INSN;
+ }
+}
+
+void perf_sample__fetch_insn(struct perf_sample *sample,
+ struct thread *thread,
+ struct machine *machine)
+{
+ int ret, len;
+ bool is64bit = false;
+ uint16_t e_machine;
+
+ if (!sample->ip || sample->insn_len != 0)
+ return;
+
+ e_machine = thread__e_machine(thread, machine, /*e_flags=*/NULL);
+ len = elf_machine_max_instruction_length(e_machine);
+ len = thread__memcpy(thread, machine, sample->insn,
+ sample->ip, len,
+ &is64bit);
+ if (len <= 0)
+ return;
+
+ sample->insn_len = len;
+
+ if (e_machine == EM_386 || e_machine == EM_X86_64) {
+ /* Refine the x86 instruction length with the decoder. */
+ struct insn insn;
+
+ ret = insn_decode(&insn, sample->insn, len,
+ is64bit ? INSN_MODE_64 : INSN_MODE_32);
+ if (ret >= 0 && insn.length <= len)
+ sample->insn_len = insn.length;
+ }
+}