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| author | Troy Mitchell <troy.mitchell@linux.spacemit.com> | 2026-09-07 09:54:36 +0800 |
|---|---|---|
| committer | Yixun Lan <dlan@kernel.org> | 2026-09-15 00:09:55 +0000 |
| commit | d558af8ee0bb1b2e88e696be84adb93cf2b7be6f (patch) | |
| tree | d8801713abdfc2dddf8ef39a1e03598d1874444f /scripts/make_fit.py | |
| parent | cee9395acd8043be0644b25c34bfa86623f2b935 (diff) | |
| download | linux-stable-d558af8ee0bb1b2e88e696be84adb93cf2b7be6f.tar.gz linux-stable-d558af8ee0bb1b2e88e696be84adb93cf2b7be6f.zip | |
clk: spacemit: k3: add CPU PLL rate tables
The K3 CPU PLL rate tables currently describe only one rate per PLL,
although the hardware supports a wider range.
PLL3 and PLL4 support rates from 1.05 to 2.4 GHz, while PLL5 and PLL8
support rates from 1.05 to 2 GHz. Populate the tables with every
supported rate in 50 MHz steps.
Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
Cc: stable@vger.kernel.org # 7.0+
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Reviewed-by: Yixun Lan <dlan@kernel.org>
Link: https://patch.msgid.link/20260907-k3-pll5-pll8-1800mhz-v5-1-5cc96d716b0a@linux.spacemit.com
Signed-off-by: Yixun Lan <dlan@kernel.org>
Diffstat (limited to 'scripts/make_fit.py')
0 files changed, 0 insertions, 0 deletions