diff options
| author | Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> | 2026-09-17 13:13:22 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2026-09-28 12:14:43 +0300 |
| commit | c034e8a46e4cb703018fe7e10fe5a3a974d6a7c3 (patch) | |
| tree | c01b0f16226520841c21691c46d2f0b0b91a00c7 /scripts/checkincludes.pl | |
| parent | 72d3fcf802c45d00b300f25b848a93c3a2bd7c7e (diff) | |
| download | linux-stable-c034e8a46e4cb703018fe7e10fe5a3a974d6a7c3.tar.gz linux-stable-c034e8a46e4cb703018fe7e10fe5a3a974d6a7c3.zip | |
drm/i915/vrr: Disable DC balance by default
Disable VRR DC balance by default due to timing issues observed on some
panel/TCON combinations.
Keep the module parameter to enable DC balance during debugging and to
isolate DC balance effects from underlying VRR/display timing issues.
--v2:
- Make enable_dc_balance a bool and keep it disabled by default; fix the
parameter type/value mismatch and correct the description (Chaitanya
Kumar Borah, Jani Nikula)
- Explain in the commit message why the feature is gated and why a
module parameter is used (Jani Nikula)
--v3:
- Commit message update (Jani Nikula)
Fixes: 555819270707 ("drm/i915/vrr: Enable DC Balance")
Cc: <stable@vger.kernel.org> # v7.0+
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20260917074322.2606738-1-mitulkumar.ajitkumar.golani@intel.com
(cherry picked from commit d1ef78f0581e856c4238c751e9ae2884ce58c275)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'scripts/checkincludes.pl')
0 files changed, 0 insertions, 0 deletions