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authorFan Wu <fanwu01@zju.edu.cn>2026-08-20 13:53:06 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-09-01 16:50:04 +0200
commit263f7d61a4201cde16849b2d016251806e7418be (patch)
tree861df7c5b878b85741cf319ece81111b4c41c3b1 /rust/helpers/io.c
downloadlinux-stable-263f7d61a4201cde16849b2d016251806e7418be.tar.gz
linux-stable-263f7d61a4201cde16849b2d016251806e7418be.zip
usb: typec: qcom-pmic-typec: disable cc_debounce_dwork on stopgrafted
cc_debounce_dwork is queued from the set_cc() and start_toggling() callbacks, which run from TCPM's kthread worker. port_stop() returns before tcpm_unregister_port() destroys that worker. Flushing the worker during unregister may therefore run a callback which queues the delayed work after port_stop() has returned. The delayed work can then run after devres has freed pmic_typec_port. Use disable_delayed_work_sync() in port_stop() to cancel a pending instance and prevent the TCPM callbacks from queueing another one. This issue was found by an in-house static analysis tool. Fixes: a4422ff22142 ("usb: typec: qcom: Add Qualcomm PMIC Type-C driver") Cc: stable <stable@kernel.org> # v6.10+ Assisted-by: Codex:gpt-5.6 Signed-off-by: Fan Wu <fanwu01@zju.edu.cn> Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Link: https://patch.msgid.link/20260820135307.153773-2-fanwu01@zju.edu.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'rust/helpers/io.c')
-rw-r--r--rust/helpers/io.c161
1 files changed, 161 insertions, 0 deletions
diff --git a/rust/helpers/io.c b/rust/helpers/io.c
new file mode 100644
index 000000000..308950aae
--- /dev/null
+++ b/rust/helpers/io.c
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/io.h>
+#include <linux/ioport.h>
+
+#ifdef CONFIG_HAS_IOMEM
+__rust_helper void __iomem *rust_helper_ioremap(phys_addr_t offset, size_t size)
+{
+ return ioremap(offset, size);
+}
+
+__rust_helper void __iomem *rust_helper_ioremap_np(phys_addr_t offset,
+ size_t size)
+{
+ return ioremap_np(offset, size);
+}
+
+__rust_helper void rust_helper_iounmap(void __iomem *addr)
+{
+ iounmap(addr);
+}
+#endif /* CONFIG_HAS_IOMEM */
+
+__rust_helper void rust_helper_memcpy_fromio(void *dst,
+ const volatile void __iomem *src,
+ size_t count)
+{
+ memcpy_fromio(dst, src, count);
+}
+
+__rust_helper void rust_helper_memcpy_toio(volatile void __iomem *dst,
+ const void *src, size_t count)
+{
+ memcpy_toio(dst, src, count);
+}
+
+__rust_helper u8 rust_helper_readb(const void __iomem *addr)
+{
+ return readb(addr);
+}
+
+__rust_helper u16 rust_helper_readw(const void __iomem *addr)
+{
+ return readw(addr);
+}
+
+__rust_helper u32 rust_helper_readl(const void __iomem *addr)
+{
+ return readl(addr);
+}
+
+#ifdef CONFIG_64BIT
+__rust_helper u64 rust_helper_readq(const void __iomem *addr)
+{
+ return readq(addr);
+}
+#endif
+
+__rust_helper void rust_helper_writeb(u8 value, void __iomem *addr)
+{
+ writeb(value, addr);
+}
+
+__rust_helper void rust_helper_writew(u16 value, void __iomem *addr)
+{
+ writew(value, addr);
+}
+
+__rust_helper void rust_helper_writel(u32 value, void __iomem *addr)
+{
+ writel(value, addr);
+}
+
+#ifdef CONFIG_64BIT
+__rust_helper void rust_helper_writeq(u64 value, void __iomem *addr)
+{
+ writeq(value, addr);
+}
+#endif
+
+__rust_helper u8 rust_helper_readb_relaxed(const void __iomem *addr)
+{
+ return readb_relaxed(addr);
+}
+
+__rust_helper u16 rust_helper_readw_relaxed(const void __iomem *addr)
+{
+ return readw_relaxed(addr);
+}
+
+__rust_helper u32 rust_helper_readl_relaxed(const void __iomem *addr)
+{
+ return readl_relaxed(addr);
+}
+
+#ifdef CONFIG_64BIT
+__rust_helper u64 rust_helper_readq_relaxed(const void __iomem *addr)
+{
+ return readq_relaxed(addr);
+}
+#endif
+
+__rust_helper void rust_helper_writeb_relaxed(u8 value, void __iomem *addr)
+{
+ writeb_relaxed(value, addr);
+}
+
+__rust_helper void rust_helper_writew_relaxed(u16 value, void __iomem *addr)
+{
+ writew_relaxed(value, addr);
+}
+
+__rust_helper void rust_helper_writel_relaxed(u32 value, void __iomem *addr)
+{
+ writel_relaxed(value, addr);
+}
+
+#ifdef CONFIG_64BIT
+__rust_helper void rust_helper_writeq_relaxed(u64 value, void __iomem *addr)
+{
+ writeq_relaxed(value, addr);
+}
+#endif
+
+__rust_helper resource_size_t rust_helper_resource_size(struct resource *res)
+{
+ return resource_size(res);
+}
+
+__rust_helper struct resource *
+rust_helper_request_mem_region(resource_size_t start, resource_size_t n,
+ const char *name)
+{
+ return request_mem_region(start, n, name);
+}
+
+__rust_helper void rust_helper_release_mem_region(resource_size_t start,
+ resource_size_t n)
+{
+ release_mem_region(start, n);
+}
+
+__rust_helper struct resource *rust_helper_request_region(resource_size_t start,
+ resource_size_t n,
+ const char *name)
+{
+ return request_region(start, n, name);
+}
+
+__rust_helper struct resource *
+rust_helper_request_muxed_region(resource_size_t start, resource_size_t n,
+ const char *name)
+{
+ return request_muxed_region(start, n, name);
+}
+
+__rust_helper void rust_helper_release_region(resource_size_t start,
+ resource_size_t n)
+{
+ release_region(start, n);
+}