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| author | Fuad Tabba <fuad.tabba@linux.dev> | 2026-09-22 19:14:30 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2026-09-23 12:34:30 +0000 |
| commit | 2bc6b218717b9d08f466f88209251d54bc09b207 (patch) | |
| tree | cb91c941eccb15f94cbec4e96aa3a9c8736b5d66 /include/trace/events/percpu.h | |
| download | linux-stable-2bc6b218717b9d08f466f88209251d54bc09b207.tar.gz linux-stable-2bc6b218717b9d08f466f88209251d54bc09b207.zip | |
arm64/boot: Disable trapping of PMZR_EL0 writes to EL2grafted
__init_el2_fgt2() writes one mask to both HDFGRTR2_EL2 and HDFGWTR2_EL2.
PMZR_EL0 is write-only, so its trap bit, nPMZR_EL0, exists only in
HDFGWTR2_EL2 and is therefore never set: a PMZR_EL0 write from the host
traps to EL2, where the nVHE hypervisor has no handler and BUG()s. The
kernel never writes PMZR_EL0, but kernel.perf_user_access=1 has the PMU
driver set PMUSERENR_EL0.UEN for a task with a user-read event, so a
write from EL0 reaches the trap and takes the host down without a panic
message.
Accumulate the HDFGWTR2_EL2 bits separately, as __init_el2_fgt() already
does for HDFGWTR_EL2, and set nPMZR_EL0 with the other FEAT_PMUv3p9
bits.
Fixes: 858c7bfcb35e1 ("arm64/boot: Enable EL2 requirements for FEAT_PMUv3p9")
Cc: stable@vger.kernel.org
Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Oliver Upton <oupton@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'include/trace/events/percpu.h')
| -rw-r--r-- | include/trace/events/percpu.h | 137 |
1 files changed, 137 insertions, 0 deletions
diff --git a/include/trace/events/percpu.h b/include/trace/events/percpu.h new file mode 100644 index 000000000..5b8211ca8 --- /dev/null +++ b/include/trace/events/percpu.h @@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM percpu + +#if !defined(_TRACE_PERCPU_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_PERCPU_H + +#include <linux/tracepoint.h> +#include <trace/events/mmflags.h> + +TRACE_EVENT(percpu_alloc_percpu, + + TP_PROTO(unsigned long call_site, + bool reserved, bool is_atomic, size_t size, + size_t align, void *base_addr, int off, + void __percpu *ptr, size_t bytes_alloc, gfp_t gfp_flags), + + TP_ARGS(call_site, reserved, is_atomic, size, align, base_addr, off, + ptr, bytes_alloc, gfp_flags), + + TP_STRUCT__entry( + __field( unsigned long, call_site ) + __field( bool, reserved ) + __field( bool, is_atomic ) + __field( size_t, size ) + __field( size_t, align ) + __field( void *, base_addr ) + __field( int, off ) + __field( void __percpu *, ptr ) + __field( size_t, bytes_alloc ) + __field( unsigned long, gfp_flags ) + ), + TP_fast_assign( + __entry->call_site = call_site; + __entry->reserved = reserved; + __entry->is_atomic = is_atomic; + __entry->size = size; + __entry->align = align; + __entry->base_addr = base_addr; + __entry->off = off; + __entry->ptr = ptr; + __entry->bytes_alloc = bytes_alloc; + __entry->gfp_flags = (__force unsigned long)gfp_flags; + ), + + TP_printk("call_site=%pS reserved=%d is_atomic=%d size=%zu align=%zu base_addr=%p off=%d ptr=%p bytes_alloc=%zu gfp_flags=%s", + (void *)__entry->call_site, + __entry->reserved, __entry->is_atomic, + __entry->size, __entry->align, + __entry->base_addr, __entry->off, __entry->ptr, + __entry->bytes_alloc, show_gfp_flags(__entry->gfp_flags)) +); + +TRACE_EVENT(percpu_free_percpu, + + TP_PROTO(void *base_addr, int off, void __percpu *ptr), + + TP_ARGS(base_addr, off, ptr), + + TP_STRUCT__entry( + __field( void *, base_addr ) + __field( int, off ) + __field( void __percpu *, ptr ) + ), + + TP_fast_assign( + __entry->base_addr = base_addr; + __entry->off = off; + __entry->ptr = ptr; + ), + + TP_printk("base_addr=%p off=%d ptr=%p", + __entry->base_addr, __entry->off, __entry->ptr) +); + +TRACE_EVENT(percpu_alloc_percpu_fail, + + TP_PROTO(bool reserved, bool is_atomic, size_t size, size_t align), + + TP_ARGS(reserved, is_atomic, size, align), + + TP_STRUCT__entry( + __field( bool, reserved ) + __field( bool, is_atomic ) + __field( size_t, size ) + __field( size_t, align ) + ), + + TP_fast_assign( + __entry->reserved = reserved; + __entry->is_atomic = is_atomic; + __entry->size = size; + __entry->align = align; + ), + + TP_printk("reserved=%d is_atomic=%d size=%zu align=%zu", + __entry->reserved, __entry->is_atomic, + __entry->size, __entry->align) +); + +TRACE_EVENT(percpu_create_chunk, + + TP_PROTO(void *base_addr), + + TP_ARGS(base_addr), + + TP_STRUCT__entry( + __field( void *, base_addr ) + ), + + TP_fast_assign( + __entry->base_addr = base_addr; + ), + + TP_printk("base_addr=%p", __entry->base_addr) +); + +TRACE_EVENT(percpu_destroy_chunk, + + TP_PROTO(void *base_addr), + + TP_ARGS(base_addr), + + TP_STRUCT__entry( + __field( void *, base_addr ) + ), + + TP_fast_assign( + __entry->base_addr = base_addr; + ), + + TP_printk("base_addr=%p", __entry->base_addr) +); + +#endif /* _TRACE_PERCPU_H */ + +#include <trace/define_trace.h> |
