drm/mediatek: Add missing IS_ERR check for ovl_adaptor platform devicegrafted

platform_device_register_data() can fail and return an ERR_PTR, but the
return value is used without checking, leading to an invalid pointer
being stored in ddp_comp[].dev and passed to component_match_add() and
mtk_ddp_comp_init(), which could result in a kernel crash.

Add an IS_ERR() check to jump to the error handling path on failure.

Fixes: 0d9eee9118b7 ("drm/mediatek: Add drm ovl_adaptor sub driver for MT8195")
Cc: stable@vger.kernel.org
Signed-off-by: Haojie Li <lihaojie@kylinos.cn>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20260825100845.438893-1-lihaojie@kylinos.cn/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

1 files changed, 72 insertions, 0 deletions

diff --git a/include/soc/tegra/pm.h b/include/soc/tegra/pm.h
new file mode 100644
index 000000000..ce4d0b1bd
--- /dev/null
+++ b/include/soc/tegra/pm.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2014 NVIDIA Corporation
+ */
+
+#ifndef __SOC_TEGRA_PM_H__
+#define __SOC_TEGRA_PM_H__
+
+#include <linux/errno.h>
+
+enum tegra_suspend_mode {
+	TEGRA_SUSPEND_NONE = 0,
+	TEGRA_SUSPEND_LP2, /* CPU voltage off */
+	TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
+	TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
+	TEGRA_MAX_SUSPEND_MODE,
+	TEGRA_SUSPEND_NOT_READY,
+};
+
+#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) && defined(CONFIG_ARCH_TEGRA)
+enum tegra_suspend_mode
+tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
+
+/* low-level resume entry point */
+void tegra_resume(void);
+
+int tegra30_pm_secondary_cpu_suspend(unsigned long arg);
+void tegra_pm_clear_cpu_in_lp2(void);
+void tegra_pm_set_cpu_in_lp2(void);
+int tegra_pm_enter_lp2(void);
+int tegra_pm_park_secondary_cpu(unsigned long cpu);
+void tegra_pm_init_suspend(void);
+#else
+static inline enum tegra_suspend_mode
+tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
+{
+	return TEGRA_SUSPEND_NONE;
+}
+
+static inline void tegra_resume(void)
+{
+}
+
+static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg)
+{
+	return -ENOTSUPP;
+}
+
+static inline void tegra_pm_clear_cpu_in_lp2(void)
+{
+}
+
+static inline void tegra_pm_set_cpu_in_lp2(void)
+{
+}
+
+static inline int tegra_pm_enter_lp2(void)
+{
+	return -ENOTSUPP;
+}
+
+static inline int tegra_pm_park_secondary_cpu(unsigned long cpu)
+{
+	return -ENOTSUPP;
+}
+
+static inline void tegra_pm_init_suspend(void)
+{
+}
+#endif /* CONFIG_PM_SLEEP */
+
+#endif /* __SOC_TEGRA_PM_H__ */