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authorRob Herring (Arm) <robh@kernel.org>2026-08-31 14:43:51 -0500
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2026-09-13 18:17:31 -0700
commit55fc280e951ab2b39f3dcb640edc1b1eebc6d173 (patch)
treef0b5f37b42fc13b9908a31b657c646b024231cdd /include/asm-generic/cache.h
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Input: tsc2007 - read "ti,poll-period" as u32grafted
The "ti,poll-period" property is documented as a normal uint32 cell. The driver used a u64 helper, which makes the helper type disagree with the schema even though the stored value is still small. Read "ti,poll-period" with the u32 helper matching the documented DT cell size. Assisted-by: Codex:gpt-5-5 Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260831194352.1185860-1-robh@kernel.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Diffstat (limited to 'include/asm-generic/cache.h')
-rw-r--r--include/asm-generic/cache.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-generic/cache.h b/include/asm-generic/cache.h
new file mode 100644
index 000000000..60386e164
--- /dev/null
+++ b/include/asm-generic/cache.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_GENERIC_CACHE_H
+#define __ASM_GENERIC_CACHE_H
+/*
+ * 32 bytes appears to be the most common cache line size,
+ * so make that the default here. Architectures with larger
+ * cache lines need to provide their own cache.h.
+ */
+
+#define L1_CACHE_SHIFT 5
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
+#endif /* __ASM_GENERIC_CACHE_H */