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authorEduard Zingerman <eddyz87@gmail.com>2026-09-04 01:33:23 -0700
committerKumar Kartikeya Dwivedi <memxor@gmail.com>2026-09-04 12:58:04 +0200
commit836b2fe544a5e9b5ce116622cb36fba33838c6fd (patch)
tree95e38e4aaa0a6a78e373148b3d0af4aa2ab3d371 /include/asm-generic/bitops/lock.h
downloadlinux-stable-836b2fe544a5e9b5ce116622cb36fba33838c6fd.tar.gz
linux-stable-836b2fe544a5e9b5ce116622cb36fba33838c6fd.zip
selftests/bpf: Check that JMP32 pointer vs zero jumps are not predictedgrafted
Add jmp32_ptr_vs_zero_jne: the fall-through of the 32-bit compare, which the verifier used to skip, contains an out of bounds map value access, hence w/o the previous patch the program is accepted. See previous patch for detailed description. Reported-by: Nicholas Carlini <npc@anthropic.com> Suggested-by: Nicholas Carlini <npc@anthropic.com> Signed-off-by: Eduard Zingerman <eddyz87@gmail.com> Link: https://lore.kernel.org/bpf/20260904083325.2083493-6-eddyz87@gmail.com Signed-off-by: Kumar Kartikeya Dwivedi <memxor@gmail.com>
Diffstat (limited to 'include/asm-generic/bitops/lock.h')
-rw-r--r--include/asm-generic/bitops/lock.h82
1 files changed, 82 insertions, 0 deletions
diff --git a/include/asm-generic/bitops/lock.h b/include/asm-generic/bitops/lock.h
new file mode 100644
index 000000000..ffb73b612
--- /dev/null
+++ b/include/asm-generic/bitops/lock.h
@@ -0,0 +1,82 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_GENERIC_BITOPS_LOCK_H_
+#define _ASM_GENERIC_BITOPS_LOCK_H_
+
+#include <linux/atomic.h>
+#include <linux/compiler.h>
+#include <asm/barrier.h>
+
+/**
+ * arch_test_and_set_bit_lock - Set a bit and return its old value, for lock
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is atomic and provides acquire barrier semantics if
+ * the returned value is 0.
+ * It can be used to implement bit locks.
+ */
+static __always_inline int
+arch_test_and_set_bit_lock(unsigned int nr, volatile unsigned long *addr)
+{
+ long old;
+ unsigned long mask = BIT_MASK(nr);
+
+ addr += BIT_WORD(nr);
+ if (READ_ONCE(*addr) & mask)
+ return 1;
+
+ old = raw_atomic_long_fetch_or_acquire(mask, (atomic_long_t *)addr);
+ return !!(old & mask);
+}
+
+
+/**
+ * arch_clear_bit_unlock - Clear a bit in memory, for unlock
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * This operation is atomic and provides release barrier semantics.
+ */
+static __always_inline void
+arch_clear_bit_unlock(unsigned int nr, volatile unsigned long *addr)
+{
+ addr += BIT_WORD(nr);
+ raw_atomic_long_fetch_andnot_release(BIT_MASK(nr), (atomic_long_t *)addr);
+}
+
+/**
+ * arch___clear_bit_unlock - Clear a bit in memory, for unlock
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * A weaker form of clear_bit_unlock() as used by __bit_lock_unlock(). If all
+ * the bits in the word are protected by this lock some archs can use weaker
+ * ops to safely unlock.
+ *
+ * See for example x86's implementation.
+ */
+static inline void
+arch___clear_bit_unlock(unsigned int nr, volatile unsigned long *addr)
+{
+ unsigned long old;
+
+ addr += BIT_WORD(nr);
+ old = READ_ONCE(*addr);
+ old &= ~BIT_MASK(nr);
+ raw_atomic_long_set_release((atomic_long_t *)addr, old);
+}
+
+#ifndef arch_xor_unlock_is_negative_byte
+static inline bool arch_xor_unlock_is_negative_byte(unsigned long mask,
+ volatile unsigned long *p)
+{
+ long old;
+
+ old = raw_atomic_long_fetch_xor_release(mask, (atomic_long_t *)p);
+ return !!(old & BIT(7));
+}
+#endif
+
+#include <asm-generic/bitops/instrumented-lock.h>
+
+#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */