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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2026-09-05 11:59:05 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2026-09-05 11:59:05 -0700 |
| commit | 9f0346dcbea363787186c94ef94dd01aaa215afa (patch) | |
| tree | b81c168f4d0dbe4c7f4750f4598d48a6deb72094 /include/asm-generic/bitops/atomic.h | |
| download | linux-stable-9f0346dcbea363787186c94ef94dd01aaa215afa.tar.gz linux-stable-9f0346dcbea363787186c94ef94dd01aaa215afa.zip | |
Merge tag 'driver-core-7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-coregrafted
Pull driver core fixes from Danilo Krummrich:
- Fix kernfs listxattr() not returning security xattr names (e.g.
SELinux labels) when the kernfs node has no allocated kernfs_iattrs
- Fix silent truncation of IRQ vector indices in the Rust PCI
abstractions
- Don't select OF from DRIVER_PE_KUNIT_TEST; skip the test when OF is
disabled instead of silently enabling extra kernel functionality
- Russ Weight is retiring from kernel development; update the Firmware
Loader sysfs contact to the driver-core mailing list, add a CREDITS
entry for Firmware Upload, and update MAINTAINERS accordingly
* tag 'driver-core-7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core:
MAINTAINERS: Remove Russ Weight from Firmware Loader
CREDITS: Add CREDITS entry for Firmware Upload
firmware_loader: Change contact for sysfs nodes
rust: pci: reject IRQ vector indices that do not fit in u32
kernfs: preserve security xattrs without allocating iattrs
drivers: base: test: DRIVER_PE_KUNIT_TEST should not select OF
Diffstat (limited to 'include/asm-generic/bitops/atomic.h')
| -rw-r--r-- | include/asm-generic/bitops/atomic.h | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/include/asm-generic/bitops/atomic.h b/include/asm-generic/bitops/atomic.h new file mode 100644 index 000000000..e076e079f --- /dev/null +++ b/include/asm-generic/bitops/atomic.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_GENERIC_BITOPS_ATOMIC_H_ +#define _ASM_GENERIC_BITOPS_ATOMIC_H_ + +#include <linux/atomic.h> +#include <linux/compiler.h> +#include <asm/barrier.h> + +/* + * Implementation of atomic bitops using atomic-fetch ops. + * See Documentation/atomic_bitops.txt for details. + */ + +static __always_inline void +arch_set_bit(unsigned int nr, volatile unsigned long *p) +{ + p += BIT_WORD(nr); + raw_atomic_long_or(BIT_MASK(nr), (atomic_long_t *)p); +} + +static __always_inline void +arch_clear_bit(unsigned int nr, volatile unsigned long *p) +{ + p += BIT_WORD(nr); + raw_atomic_long_andnot(BIT_MASK(nr), (atomic_long_t *)p); +} + +static __always_inline void +arch_change_bit(unsigned int nr, volatile unsigned long *p) +{ + p += BIT_WORD(nr); + raw_atomic_long_xor(BIT_MASK(nr), (atomic_long_t *)p); +} + +static __always_inline int +arch_test_and_set_bit(unsigned int nr, volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + old = raw_atomic_long_fetch_or(mask, (atomic_long_t *)p); + return !!(old & mask); +} + +static __always_inline int +arch_test_and_clear_bit(unsigned int nr, volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + old = raw_atomic_long_fetch_andnot(mask, (atomic_long_t *)p); + return !!(old & mask); +} + +static __always_inline int +arch_test_and_change_bit(unsigned int nr, volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + old = raw_atomic_long_fetch_xor(mask, (atomic_long_t *)p); + return !!(old & mask); +} + +#include <asm-generic/bitops/instrumented-atomic.h> + +#endif /* _ASM_GENERIC_BITOPS_ATOMIC_H */ |
