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| author | Cheng Lingfei <chenglingfei@foxmail.com> | 2026-08-24 20:45:46 +0800 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2026-08-24 06:55:59 -1000 |
| commit | 909a3f0e9d8b0d8001cf6e99808f88eca8e44328 (patch) | |
| tree | be05d18bd5619b55ff3b30f28a292907021768ee /include/asm-generic/bitops/atomic.h | |
| download | linux-stable-909a3f0e9d8b0d8001cf6e99808f88eca8e44328.tar.gz linux-stable-909a3f0e9d8b0d8001cf6e99808f88eca8e44328.zip | |
docs: cgroup-v2: fix misc.events key format descriptiongrafted
In misc cgroup, misc.events does not output a simple "max" key. Instead,
each registered misc resource outputs a separate key suffixed with ".max"
(i.e., "<res>.max").
Update the documentation to clarify that the entry key is "<res>.max".
Suggested-by: Michal Koutný <mkoutny@suse.com>
Signed-off-by: Cheng Lingfei <chenglingfei@foxmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'include/asm-generic/bitops/atomic.h')
| -rw-r--r-- | include/asm-generic/bitops/atomic.h | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/include/asm-generic/bitops/atomic.h b/include/asm-generic/bitops/atomic.h new file mode 100644 index 000000000..e076e079f --- /dev/null +++ b/include/asm-generic/bitops/atomic.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_GENERIC_BITOPS_ATOMIC_H_ +#define _ASM_GENERIC_BITOPS_ATOMIC_H_ + +#include <linux/atomic.h> +#include <linux/compiler.h> +#include <asm/barrier.h> + +/* + * Implementation of atomic bitops using atomic-fetch ops. + * See Documentation/atomic_bitops.txt for details. + */ + +static __always_inline void +arch_set_bit(unsigned int nr, volatile unsigned long *p) +{ + p += BIT_WORD(nr); + raw_atomic_long_or(BIT_MASK(nr), (atomic_long_t *)p); +} + +static __always_inline void +arch_clear_bit(unsigned int nr, volatile unsigned long *p) +{ + p += BIT_WORD(nr); + raw_atomic_long_andnot(BIT_MASK(nr), (atomic_long_t *)p); +} + +static __always_inline void +arch_change_bit(unsigned int nr, volatile unsigned long *p) +{ + p += BIT_WORD(nr); + raw_atomic_long_xor(BIT_MASK(nr), (atomic_long_t *)p); +} + +static __always_inline int +arch_test_and_set_bit(unsigned int nr, volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + old = raw_atomic_long_fetch_or(mask, (atomic_long_t *)p); + return !!(old & mask); +} + +static __always_inline int +arch_test_and_clear_bit(unsigned int nr, volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + old = raw_atomic_long_fetch_andnot(mask, (atomic_long_t *)p); + return !!(old & mask); +} + +static __always_inline int +arch_test_and_change_bit(unsigned int nr, volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + old = raw_atomic_long_fetch_xor(mask, (atomic_long_t *)p); + return !!(old & mask); +} + +#include <asm-generic/bitops/instrumented-atomic.h> + +#endif /* _ASM_GENERIC_BITOPS_ATOMIC_H */ |
