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authorYijie Yang <yijie.yang@oss.qualcomm.com>2026-08-11 16:46:47 +0800
committerRob Herring (Arm) <robh@kernel.org>2026-08-15 15:46:52 -0500
commite1c13aed4a1641550e8c9518c96f016e1d52d09b (patch)
tree61c2297688373db165cc857b7c7adcb147a5c419 /drivers/pinctrl/tegra/Kconfig
downloadlinux-stable-e1c13aed4a1641550e8c9518c96f016e1d52d09b.tar.gz
linux-stable-e1c13aed4a1641550e8c9518c96f016e1d52d09b.zip
dt-bindings: interconnect: qcom-bwmon: Add Maili cpu-bwmon compatiblegrafted
Add the Qualcomm Maili SoC compatible string for the CPU bandwidth monitor (BWMONv4). This falls back to the sdm845-bwmon compatible, consistent with the existing pattern used by other recent SoCs such as sm8750 and kaanapali. Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://patch.msgid.link/20260811-bwmon-v2-1-80f7f150ab9e@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Diffstat (limited to 'drivers/pinctrl/tegra/Kconfig')
-rw-r--r--drivers/pinctrl/tegra/Kconfig67
1 files changed, 67 insertions, 0 deletions
diff --git a/drivers/pinctrl/tegra/Kconfig b/drivers/pinctrl/tegra/Kconfig
new file mode 100644
index 000000000..39a93733e
--- /dev/null
+++ b/drivers/pinctrl/tegra/Kconfig
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config PINCTRL_TEGRA
+ bool "NVIDIA Tegra pin controllers common" if COMPILE_TEST && !ARCH_TEGRA
+ select PINMUX
+ select PINCONF
+
+config PINCTRL_TEGRA20
+ bool "NVIDIA Tegra20 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+ depends on COMMON_CLK
+
+config PINCTRL_TEGRA30
+ bool "NVIDIA Tegra30 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA114
+ bool "NVIDIA Tegra114 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA124
+ bool "NVIDIA Tegra124 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA210
+ bool "NVIDIA Tegra210 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA186
+ bool "NVIDIA Tegra186 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA194
+ bool "NVIDIA Tegra194 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA234
+ bool "NVIDIA Tegra234 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA238
+ tristate "NVIDIA Tegra238 pinctrl driver"
+ depends on ARCH_TEGRA || COMPILE_TEST
+ default m if ARCH_TEGRA_238_SOC
+ select PINCTRL_TEGRA
+ help
+ Say Y or M here to enable support for the pinctrl driver for
+ NVIDIA Tegra238 SoC. This driver controls the pin multiplexing
+ and configuration for the MAIN and AON pin controllers found
+ on Tegra238.
+
+config PINCTRL_TEGRA264
+ tristate "NVIDIA Tegra264 pinctrl driver"
+ depends on ARCH_TEGRA || COMPILE_TEST
+ default m if ARCH_TEGRA_264_SOC
+ select PINCTRL_TEGRA
+ help
+ Say Y or M here to enable support for the pinctrl driver for
+ NVIDIA Tegra264 SoC. This driver controls the pin multiplexing
+ and configuration for the MAIN, AON and UPHY pin controllers found
+ on Tegra264.
+
+config PINCTRL_TEGRA_XUSB
+ bool "NVIDIA Tegra XUSB pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ default y if ARCH_TEGRA
+ select GENERIC_PHY
+ select PINCONF
+ select PINMUX