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authorLinus Torvalds <torvalds@linux-foundation.org>2026-08-24 08:46:03 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2026-08-24 08:46:03 -0700
commitcf9610f9116d55c5a66ef9f1faecacabd93a9322 (patch)
tree757a3d280760c654767631cab5ad8af2d86d1848 /drivers/pinctrl/tegra/Kconfig
downloadlinux-stable-cf9610f9116d55c5a66ef9f1faecacabd93a9322.tar.gz
linux-stable-cf9610f9116d55c5a66ef9f1faecacabd93a9322.zip
Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlgrafted
Pull pin control updates from Linus Walleij: "Core changes: - Use the non-blocking mux_state_try_select() in the generic MUX pin control back-end - Free pin maps on pinctrl_generic_to_map() failure in the core helpers New hardware pin control: - Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC (this is for the low power audio, LPASS = Low Power Audio SubSystem portions) - Upboard support on top of the Intel pin controller - Apple T6030 and T6031 support (just compatible strings) - Samsung Exynos 8855 SoC - Mediatek MT6858 SoC - Rockchip RK3308B and RV1106 SoCs - Airoha EN7523 and AN7563 SoCs Improvements: - Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable - Qualcomm improvements on top of the Qualcomm PDC (power domain controller) irqchip improvements from tglx:s tree - Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups - The NPCM8xx driver has been put into shape fixing many pin and group definitions - Some non-urgent Tegra 264 pin assignments are fixed up - Some non-urgent fixups to Airoha AN7581 and AN7583 registers and pin assignments, missing features etc" * tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits) dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema pinctrl: meson: sync some modify from A4 pinctrl: meson: a4: Add input enable pin configuration pinctrl: realtek: rtd1625: remove unused group name spdif_sel pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13 dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Revert "Merge branch 'ib-rsk7204' into devel" pinctrl: rockchip: Add RV1106 pinctrl support dt-bindings: pinctrl: rockchip: Add RV1106 compatible pinctrl: rockchip: Decode drive strength in the get function pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable pinctrl: airoha: add support of an7563 SoC dt-bindings: pinctrl: airoha: add support of an7563 pin controller pinctrl: airoha: try to find chip scu node by phandle first pinctrl: airoha: add support of en7523 SoC dt-bindings: pinctrl: airoha: add support of en7523 pin controller pinctrl: airoha: an7583: add support for olt pinmux pinctrl: airoha: an7583: add support for pon_alt pinmux pinctrl: airoha: an7583: add support for npu_uart pinmux dt-bindings: pinctrl: airoha: an7583: add missed features ...
Diffstat (limited to 'drivers/pinctrl/tegra/Kconfig')
-rw-r--r--drivers/pinctrl/tegra/Kconfig67
1 files changed, 67 insertions, 0 deletions
diff --git a/drivers/pinctrl/tegra/Kconfig b/drivers/pinctrl/tegra/Kconfig
new file mode 100644
index 000000000..39a93733e
--- /dev/null
+++ b/drivers/pinctrl/tegra/Kconfig
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config PINCTRL_TEGRA
+ bool "NVIDIA Tegra pin controllers common" if COMPILE_TEST && !ARCH_TEGRA
+ select PINMUX
+ select PINCONF
+
+config PINCTRL_TEGRA20
+ bool "NVIDIA Tegra20 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+ depends on COMMON_CLK
+
+config PINCTRL_TEGRA30
+ bool "NVIDIA Tegra30 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA114
+ bool "NVIDIA Tegra114 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA124
+ bool "NVIDIA Tegra124 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA210
+ bool "NVIDIA Tegra210 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA186
+ bool "NVIDIA Tegra186 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA194
+ bool "NVIDIA Tegra194 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA234
+ bool "NVIDIA Tegra234 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA238
+ tristate "NVIDIA Tegra238 pinctrl driver"
+ depends on ARCH_TEGRA || COMPILE_TEST
+ default m if ARCH_TEGRA_238_SOC
+ select PINCTRL_TEGRA
+ help
+ Say Y or M here to enable support for the pinctrl driver for
+ NVIDIA Tegra238 SoC. This driver controls the pin multiplexing
+ and configuration for the MAIN and AON pin controllers found
+ on Tegra238.
+
+config PINCTRL_TEGRA264
+ tristate "NVIDIA Tegra264 pinctrl driver"
+ depends on ARCH_TEGRA || COMPILE_TEST
+ default m if ARCH_TEGRA_264_SOC
+ select PINCTRL_TEGRA
+ help
+ Say Y or M here to enable support for the pinctrl driver for
+ NVIDIA Tegra264 SoC. This driver controls the pin multiplexing
+ and configuration for the MAIN, AON and UPHY pin controllers found
+ on Tegra264.
+
+config PINCTRL_TEGRA_XUSB
+ bool "NVIDIA Tegra XUSB pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ default y if ARCH_TEGRA
+ select GENERIC_PHY
+ select PINCONF
+ select PINMUX