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authorZeng Chi <zengchi@kylinos.cn>2026-09-21 18:24:42 +0800
committerSean Christopherson <seanjc@google.com>2026-09-22 08:36:16 -0700
commit119e9db233ad0f4cbd4cfb9f9385a7bca378b37d (patch)
tree660d50d4139cb750fbde1ae3432452c20726c99d /drivers/pinctrl/tegra/Kconfig
downloadlinux-stable-119e9db233ad0f4cbd4cfb9f9385a7bca378b37d.tar.gz
linux-stable-119e9db233ad0f4cbd4cfb9f9385a7bca378b37d.zip
KVM: Don't pre-reserve xarray entries when storing empty/NULL attributesgrafted
Skip the xarray reservation loop when clearing all memory attributes, as storing NULL only erases the entry and never needs to allocate, so no reservation (and no cleanup of a failed one) is required in that case. Suggested-by: Sean Christopherson <seanjc@google.com> Cc: David Ballesteros <davimaba.v@proton.me> Signed-off-by: Zeng Chi <zengchi@kylinos.cn> Link: https://patch.msgid.link/20260921102442.1232375-1-zeng_chi911@163.com [sean: split to separate patch] Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'drivers/pinctrl/tegra/Kconfig')
-rw-r--r--drivers/pinctrl/tegra/Kconfig67
1 files changed, 67 insertions, 0 deletions
diff --git a/drivers/pinctrl/tegra/Kconfig b/drivers/pinctrl/tegra/Kconfig
new file mode 100644
index 000000000..39a93733e
--- /dev/null
+++ b/drivers/pinctrl/tegra/Kconfig
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config PINCTRL_TEGRA
+ bool "NVIDIA Tegra pin controllers common" if COMPILE_TEST && !ARCH_TEGRA
+ select PINMUX
+ select PINCONF
+
+config PINCTRL_TEGRA20
+ bool "NVIDIA Tegra20 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+ depends on COMMON_CLK
+
+config PINCTRL_TEGRA30
+ bool "NVIDIA Tegra30 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA114
+ bool "NVIDIA Tegra114 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA124
+ bool "NVIDIA Tegra124 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA210
+ bool "NVIDIA Tegra210 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA186
+ bool "NVIDIA Tegra186 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA194
+ bool "NVIDIA Tegra194 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA234
+ bool "NVIDIA Tegra234 pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ select PINCTRL_TEGRA
+
+config PINCTRL_TEGRA238
+ tristate "NVIDIA Tegra238 pinctrl driver"
+ depends on ARCH_TEGRA || COMPILE_TEST
+ default m if ARCH_TEGRA_238_SOC
+ select PINCTRL_TEGRA
+ help
+ Say Y or M here to enable support for the pinctrl driver for
+ NVIDIA Tegra238 SoC. This driver controls the pin multiplexing
+ and configuration for the MAIN and AON pin controllers found
+ on Tegra238.
+
+config PINCTRL_TEGRA264
+ tristate "NVIDIA Tegra264 pinctrl driver"
+ depends on ARCH_TEGRA || COMPILE_TEST
+ default m if ARCH_TEGRA_264_SOC
+ select PINCTRL_TEGRA
+ help
+ Say Y or M here to enable support for the pinctrl driver for
+ NVIDIA Tegra264 SoC. This driver controls the pin multiplexing
+ and configuration for the MAIN, AON and UPHY pin controllers found
+ on Tegra264.
+
+config PINCTRL_TEGRA_XUSB
+ bool "NVIDIA Tegra XUSB pin controller" if COMPILE_TEST && !ARCH_TEGRA
+ default y if ARCH_TEGRA
+ select GENERIC_PHY
+ select PINCONF
+ select PINMUX