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| author | Kumar Kartikeya Dwivedi <memxor@gmail.com> | 2026-09-04 10:43:19 +0200 |
|---|---|---|
| committer | Alexei Starovoitov <ast@kernel.org> | 2026-09-04 07:58:36 -0700 |
| commit | 6668ed271eaefaa63e686bdfbedaeb7b8e492722 (patch) | |
| tree | 58e8288fead484f6755ad0815fc74c3742663761 /drivers/pinctrl/stm32/Kconfig | |
| download | linux-stable-6668ed271eaefaa63e686bdfbedaeb7b8e492722.tar.gz linux-stable-6668ed271eaefaa63e686bdfbedaeb7b8e492722.zip | |
selftests/bpf: Reject graph kptr use after RCU unlockgrafted
Add a sleepable verifier test that loads a graph-node local kptr in an
explicit RCU read-side critical section, then passes its node to
bpf_rbtree_remove() after the section ends.
Before the verifier fix, the stale NON_OWN_REF flag makes the node look like
a live borrowed reference and the program is accepted. After the fix, the
pointer is demoted without NON_OWN_REF and the graph kfunc argument is
rejected.
Also exercise a graph kptr loaded while a spin lock provides implicit RCU
protection. The pointer must be invalidated when the lock is released, which
guards the required ordering between non-owning-reference invalidation and
RCU demotion.
Update the existing fault-protected load test state description. The
post-unlock pointer no longer carries NON_OWN_REF, but remains readable
because the load is rewritten to use BPF_PROBE_MEM.
Signed-off-by: Kumar Kartikeya Dwivedi <memxor@gmail.com>
Link: https://lore.kernel.org/r/20260904084325.52250-7-memxor@gmail.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Diffstat (limited to 'drivers/pinctrl/stm32/Kconfig')
| -rw-r--r-- | drivers/pinctrl/stm32/Kconfig | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig new file mode 100644 index 000000000..d6a171523 --- /dev/null +++ b/drivers/pinctrl/stm32/Kconfig @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0-only +if ARCH_STM32 || COMPILE_TEST + +config PINCTRL_STM32 + tristate + depends on OF + select PINMUX + select GENERIC_PINCONF + select GPIOLIB + select IRQ_DOMAIN_HIERARCHY + select MFD_SYSCON + +config PINCTRL_STM32F429 + bool "STMicroelectronics STM32F429 pin control" if COMPILE_TEST && !MACH_STM32F429 + depends on OF && HAS_IOMEM + default MACH_STM32F429 + select PINCTRL_STM32 + +config PINCTRL_STM32F469 + bool "STMicroelectronics STM32F469 pin control" if COMPILE_TEST && !MACH_STM32F469 + depends on OF && HAS_IOMEM + default MACH_STM32F469 + select PINCTRL_STM32 + +config PINCTRL_STM32F746 + bool "STMicroelectronics STM32F746 pin control" if COMPILE_TEST && !MACH_STM32F746 + depends on OF && HAS_IOMEM + default MACH_STM32F746 + select PINCTRL_STM32 + +config PINCTRL_STM32F769 + bool "STMicroelectronics STM32F769 pin control" if COMPILE_TEST && !MACH_STM32F769 + depends on OF && HAS_IOMEM + default MACH_STM32F769 + select PINCTRL_STM32 + +config PINCTRL_STM32H743 + bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743 + depends on OF && HAS_IOMEM + default MACH_STM32H743 + select PINCTRL_STM32 + +config PINCTRL_STM32MP135 + bool "STMicroelectronics STM32MP135 pin control" if COMPILE_TEST && !MACH_STM32MP13 + depends on OF && HAS_IOMEM + default MACH_STM32MP13 + select PINCTRL_STM32 + +config PINCTRL_STM32MP157 + bool "STMicroelectronics STM32MP157 pin control" if COMPILE_TEST && !MACH_STM32MP157 + depends on OF && HAS_IOMEM + default MACH_STM32MP157 + select PINCTRL_STM32 + +config PINCTRL_STM32MP257 + tristate "STMicroelectronics STM32MP257 pin control" + depends on OF && HAS_IOMEM + default MACH_STM32MP25 || (ARCH_STM32 && ARM64) + select PINCTRL_STM32 + +config PINCTRL_STM32_HDP + tristate "STMicroelectronics STM32 Hardware Debug Port (HDP) pin control" + depends on OF && HAS_IOMEM + default ARCH_STM32 && !ARM_SINGLE_ARMV7M + select PINMUX + select GENERIC_PINCONF + select GPIOLIB + select GPIO_GENERIC + help + The Hardware Debug Port allows the observation of internal signals. + It uses configurable multiplexer to route signals in a dedicated observation register. + This driver also permits the observation of signals on external SoC pins. + It permits the observation of up to 16 signals per HDP line. + +endif |
