summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/pinconf-generic.c
diff options
context:
space:
mode:
authorAdrian Betschart <adrian.betschart@cinemaone.ch>2026-09-11 17:13:14 +0200
committerAlex Deucher <alexander.deucher@amd.com>2026-10-01 17:18:05 -0400
commit106b4a2a78b2a2f14885604891957b84bba502db (patch)
tree5d40eef2428fb1a4791ab46a4b19091a5910eac2 /drivers/pinctrl/pinconf-generic.c
downloadlinux-stable-106b4a2a78b2a2f14885604891957b84bba502db.tar.gz
linux-stable-106b4a2a78b2a2f14885604891957b84bba502db.zip
drm/amd/display: Try RGB before YCbCr 4:4:4 in stream validationgrafted
amdgpu_dm_create_validate_stream_for_sink() walks encoding_order[] and uses the first encoding that validates. YCbCr 4:4:4 is listed before RGB, so an HDMI sink that advertises 4:4:4 gets YCbCr 4:4:4 whenever the "color format" property is left at AUTO, even though RGB fits the same link. That contradicts the documented AUTO behaviour for HDMI in enum drm_connector_color_format (RGB, falling back to YCbCr 4:2:0 only when the bandwidth is not available or the mode is 4:2:0-only), which the amdgpu implementation of the property also describes. It also leaves the "Broadcast RGB" property without effect on such sinks, since the quantization range it selects only applies to RGB output. Try RGB first. The mask still holds every encoding the sink supports, so a mode that cannot carry RGB falls back exactly as before. For reference, v7.2 picked RGB here unless YCbCr 4:4:4 was forced through debugfs, while earlier kernels picked YCbCr 4:4:4 for any HDMI sink that advertised it. Fixes: 0b0ff65d3ca1 ("drm/amd/display: Refactor stream validation") Suggested-by: Adolfo Rodrigues <adolfotregosa@gmail.com> Assisted-by: Claude Code:claude-fable-5-1 Signed-off-by: Adrian Betschart <adrian.betschart@cinemaone.ch> Reviewed-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Adolfo Rodrigues <adolfotregosa@gmail.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 7de432bc753133764dc40d37f9388da56de251e7)
Diffstat (limited to 'drivers/pinctrl/pinconf-generic.c')
-rw-r--r--drivers/pinctrl/pinconf-generic.c555
1 files changed, 555 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
new file mode 100644
index 000000000..95c803c40
--- /dev/null
+++ b/drivers/pinctrl/pinconf-generic.c
@@ -0,0 +1,555 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Core driver for the generic pin config portions of the pin control subsystem
+ *
+ * Copyright (C) 2011 ST-Ericsson SA
+ * Written on behalf of Linaro for ST-Ericsson
+ *
+ * Author: Linus Walleij <linus.walleij@linaro.org>
+ */
+
+#define pr_fmt(fmt) "generic pinconfig core: " fmt
+
+#include <linux/array_size.h>
+#include <linux/debugfs.h>
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/property.h>
+#include <linux/slab.h>
+#include <linux/seq_file.h>
+
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "core.h"
+#include "pinconf.h"
+#include "pinctrl-utils.h"
+
+#ifdef CONFIG_DEBUG_FS
+static const struct pin_config_item conf_items[] = {
+ PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false),
+ PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false),
+ PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false),
+ PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", "ohms", true),
+ PCONFDUMP(PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
+ "input bias pull to pin specific state", "ohms", true),
+ PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", "ohms", true),
+ PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_DRAIN, "output drive open drain", NULL, false),
+ PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_SOURCE, "output drive open source", NULL, false),
+ PCONFDUMP(PIN_CONFIG_DRIVE_PUSH_PULL, "output drive push pull", NULL, false),
+ PCONFDUMP(PIN_CONFIG_DRIVE_STRENGTH, "output drive strength", "mA", true),
+ PCONFDUMP(PIN_CONFIG_DRIVE_STRENGTH_UA, "output drive strength", "uA", true),
+ PCONFDUMP(PIN_CONFIG_INPUT_DEBOUNCE, "input debounce", "usec", true),
+ PCONFDUMP(PIN_CONFIG_INPUT_ENABLE, "input enabled", NULL, false),
+ PCONFDUMP(PIN_CONFIG_INPUT_SCHMITT, "input schmitt trigger", NULL, false),
+ PCONFDUMP(PIN_CONFIG_INPUT_SCHMITT_UV, "input schmitt threshold", "uV", true),
+ PCONFDUMP(PIN_CONFIG_INPUT_SCHMITT_ENABLE, "input schmitt enabled", NULL, false),
+ PCONFDUMP(PIN_CONFIG_MODE_LOW_POWER, "pin low power", "mode", true),
+ PCONFDUMP(PIN_CONFIG_OUTPUT_ENABLE, "output enabled", NULL, false),
+ PCONFDUMP(PIN_CONFIG_LEVEL, "pin output", "level", true),
+ PCONFDUMP(PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS, "output impedance", "ohms", true),
+ PCONFDUMP(PIN_CONFIG_POWER_SOURCE, "pin power source", "selector", true),
+ PCONFDUMP(PIN_CONFIG_SLEEP_HARDWARE_STATE, "sleep hardware state", NULL, false),
+ PCONFDUMP(PIN_CONFIG_SLEW_RATE, "slew rate", NULL, true),
+ PCONFDUMP(PIN_CONFIG_SKEW_DELAY, "skew delay", NULL, true),
+ PCONFDUMP(PIN_CONFIG_SKEW_DELAY_INPUT_PS, "input skew delay", "ps", true),
+ PCONFDUMP(PIN_CONFIG_SKEW_DELAY_OUTPUT_PS, "output skew delay", "ps", true),
+ PCONFDUMP(PIN_CONFIG_INPUT_VOLTAGE_UV, "input voltage in microvolt", "uV", true),
+};
+
+static void pinconf_generic_dump_one(struct pinctrl_dev *pctldev,
+ struct seq_file *s, const char *gname,
+ unsigned int pin,
+ const struct pin_config_item *items,
+ int nitems, int *print_sep)
+{
+ int i;
+
+ for (i = 0; i < nitems; i++) {
+ const struct pin_config_item *item = &items[i];
+ unsigned long config;
+ int ret;
+
+ /* We want to check out this parameter */
+ config = pinconf_to_config_packed(item->param, 0);
+ if (gname)
+ ret = pin_config_group_get(dev_name(pctldev->dev),
+ gname, &config);
+ else
+ ret = pin_config_get_for_pin(pctldev, pin, &config);
+ /* These are legal errors */
+ if (ret == -EINVAL || ret == -ENOTSUPP)
+ continue;
+ if (ret) {
+ seq_printf(s, "ERROR READING CONFIG SETTING %d ", i);
+ continue;
+ }
+ /* comma between multiple configs */
+ if (*print_sep)
+ seq_puts(s, ", ");
+ *print_sep = 1;
+ seq_puts(s, item->display);
+ /* Print unit if available */
+ if (item->has_arg) {
+ u32 val = pinconf_to_config_argument(config);
+
+ if (item->format)
+ seq_printf(s, " (%u %s)", val, item->format);
+ else
+ seq_printf(s, " (0x%x)", val);
+
+ if (item->values && item->num_values) {
+ if (val < item->num_values)
+ seq_printf(s, " \"%s\"", item->values[val]);
+ else
+ seq_puts(s, " \"(unknown)\"");
+ }
+ }
+ }
+}
+
+/**
+ * pinconf_generic_dump_pins - Print information about pin or group of pins
+ * @pctldev: Pincontrol device
+ * @s: File to print to
+ * @gname: Group name specifying pins
+ * @pin: Pin number specifying pin
+ *
+ * Print the pinconf configuration for the requested pin(s) to @s. Pins can be
+ * specified either by pin using @pin or by group using @gname. Only one needs
+ * to be specified the other can be NULL/0.
+ */
+void pinconf_generic_dump_pins(struct pinctrl_dev *pctldev, struct seq_file *s,
+ const char *gname, unsigned int pin)
+{
+ const struct pinconf_ops *ops = pctldev->desc->confops;
+ int print_sep = 0;
+
+ if (!ops->is_generic)
+ return;
+
+ /* generic parameters */
+ pinconf_generic_dump_one(pctldev, s, gname, pin, conf_items,
+ ARRAY_SIZE(conf_items), &print_sep);
+ /* driver-specific parameters */
+ if (pctldev->desc->num_custom_params &&
+ pctldev->desc->custom_conf_items)
+ pinconf_generic_dump_one(pctldev, s, gname, pin,
+ pctldev->desc->custom_conf_items,
+ pctldev->desc->num_custom_params,
+ &print_sep);
+}
+
+void pinconf_generic_dump_config(struct pinctrl_dev *pctldev,
+ struct seq_file *s, unsigned long config)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(conf_items); i++) {
+ if (pinconf_to_config_param(config) != conf_items[i].param)
+ continue;
+ seq_printf(s, "%s: 0x%x", conf_items[i].display,
+ pinconf_to_config_argument(config));
+ }
+
+ if (!pctldev->desc->num_custom_params ||
+ !pctldev->desc->custom_conf_items)
+ return;
+
+ for (i = 0; i < pctldev->desc->num_custom_params; i++) {
+ if (pinconf_to_config_param(config) !=
+ pctldev->desc->custom_conf_items[i].param)
+ continue;
+ seq_printf(s, "%s: 0x%x",
+ pctldev->desc->custom_conf_items[i].display,
+ pinconf_to_config_argument(config));
+ }
+}
+EXPORT_SYMBOL_GPL(pinconf_generic_dump_config);
+#endif
+
+#ifdef CONFIG_OF
+static const struct pinconf_generic_params dt_params[] = {
+ { "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 },
+ { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
+ { "bias-high-impedance", PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0 },
+ { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
+ { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
+ { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
+ { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
+ { "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 },
+ { "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 },
+ { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
+ { "drive-strength-microamp", PIN_CONFIG_DRIVE_STRENGTH_UA, 0 },
+ { "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
+ { "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
+ { "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
+ { "input-schmitt", PIN_CONFIG_INPUT_SCHMITT, 0 },
+ { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
+ { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
+ { "input-schmitt-microvolts", PIN_CONFIG_INPUT_SCHMITT_UV, 0 },
+ { "low-power-disable", PIN_CONFIG_MODE_LOW_POWER, 0 },
+ { "low-power-enable", PIN_CONFIG_MODE_LOW_POWER, 1 },
+ { "output-disable", PIN_CONFIG_OUTPUT_ENABLE, 0 },
+ { "output-enable", PIN_CONFIG_OUTPUT_ENABLE, 1 },
+ { "output-high", PIN_CONFIG_LEVEL, 1, },
+ { "output-impedance-ohms", PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS, 0 },
+ { "output-low", PIN_CONFIG_LEVEL, 0, },
+ { "power-source", PIN_CONFIG_POWER_SOURCE, 0 },
+ { "sleep-hardware-state", PIN_CONFIG_SLEEP_HARDWARE_STATE, 0 },
+ { "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },
+ { "skew-delay", PIN_CONFIG_SKEW_DELAY, 0 },
+ { "skew-delay-input-ps", PIN_CONFIG_SKEW_DELAY_INPUT_PS, 0 },
+ { "skew-delay-output-ps", PIN_CONFIG_SKEW_DELAY_OUTPUT_PS, 0 },
+ { "input-threshold-voltage-microvolt", PIN_CONFIG_INPUT_VOLTAGE_UV, 0 },
+};
+
+/**
+ * parse_fw_cfg() - Parse firmware pinconf parameters
+ * @fwnode: firmware node
+ * @params: Array of describing generic parameters
+ * @count: Number of entries in @params
+ * @cfg: Array of parsed config options
+ * @ncfg: Number of entries in @cfg
+ *
+ * Parse the config options described in @params from @fwnode and puts the result
+ * in @cfg. @cfg does not need to be empty, entries are added beginning at
+ * @ncfg. @ncfg is updated to reflect the number of entries after parsing. @cfg
+ * needs to have enough memory allocated to hold all possible entries.
+ */
+static int parse_fw_cfg(struct fwnode_handle *fwnode,
+ const struct pinconf_generic_params *params,
+ unsigned int count, unsigned long *cfg,
+ unsigned int *ncfg)
+{
+ int i, test;
+
+ unsigned long *properties __free(bitmap) = bitmap_zalloc(count, GFP_KERNEL);
+
+ for (i = 0; i < count; i++) {
+ u32 val;
+ int ret;
+ const struct pinconf_generic_params *par = &params[i];
+
+ if (par->values && par->num_values) {
+ ret = fwnode_property_match_property_string(fwnode,
+ par->property,
+ par->values, par->num_values);
+ if (ret == -ENOENT)
+ return ret;
+ if (ret >= 0) {
+ val = ret;
+ ret = 0;
+ }
+ } else {
+ ret = fwnode_property_read_u32(fwnode, par->property, &val);
+ }
+
+ /* property not found */
+ if (ret == -EINVAL)
+ continue;
+
+ /* use default value, when no value is specified */
+ if (ret)
+ val = par->default_value;
+
+ /* if param is greater than count, these are custom properties */
+ if (par->param <= count) {
+ ret = test_and_set_bit(par->param, properties);
+ if (ret) {
+ pr_err("%pfw: conflicting setting detected for %s\n",
+ fwnode, par->property);
+ return -EINVAL;
+ }
+ }
+
+ pr_debug("found %s with value %u\n", par->property, val);
+ cfg[*ncfg] = pinconf_to_config_packed(par->param, val);
+ (*ncfg)++;
+ }
+
+ if (test_bit(PIN_CONFIG_DRIVE_STRENGTH, properties) &&
+ test_bit(PIN_CONFIG_DRIVE_STRENGTH_UA, properties))
+ pr_err("%pfw: cannot have multiple drive strength properties\n",
+ fwnode);
+
+ test = test_bit(PIN_CONFIG_BIAS_BUS_HOLD, properties) +
+ test_bit(PIN_CONFIG_BIAS_DISABLE, properties) +
+ test_bit(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, properties) +
+ test_bit(PIN_CONFIG_BIAS_PULL_UP, properties) +
+ test_bit(PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, properties) +
+ test_bit(PIN_CONFIG_BIAS_PULL_DOWN, properties);
+ if (test > 1)
+ pr_err("%pfw: cannot have multiple bias configurations\n",
+ fwnode);
+
+ test = test_bit(PIN_CONFIG_DRIVE_OPEN_DRAIN, properties) +
+ test_bit(PIN_CONFIG_DRIVE_OPEN_SOURCE, properties) +
+ test_bit(PIN_CONFIG_DRIVE_PUSH_PULL, properties);
+ if (test > 1)
+ pr_err("%pfw: cannot have multiple drive configurations\n",
+ fwnode);
+
+ return 0;
+}
+
+/**
+ * pinconf_generic_parse_dt_pinmux()
+ * parse the pinmux properties into generic pin mux values.
+ * @np: node containing the pinmux properties
+ * @dev: pincontrol core device
+ * @pid: array with pin identity entries
+ * @pmux: array with pin mux value entries
+ * @npins: number of pins
+ *
+ * pinmux property: mux value [0,7]bits and pin identity [8,31]bits.
+ */
+int pinconf_generic_parse_dt_pinmux(struct device_node *np, struct device *dev,
+ unsigned int **pid, unsigned int **pmux,
+ unsigned int *npins)
+{
+ struct fwnode_handle *fwnode = of_fwnode_handle(np);
+ unsigned int *pid_t;
+ unsigned int *pmux_t;
+ unsigned int npins_t, i;
+ int ret;
+
+ ret = fwnode_property_count_u32(fwnode, "pinmux");
+ if (ret < 0) {
+ dev_info(dev, "Missing pinmux property\n");
+ return ret;
+ }
+
+ npins_t = ret;
+ if (npins_t == 0) {
+ dev_info(dev, "pinmux property doesn't have entries\n");
+ return -ENODATA;
+ }
+
+ if (!pid || !pmux || !npins) {
+ dev_err(dev, "parameters error\n");
+ return -EINVAL;
+ }
+
+ pid_t = devm_kcalloc(dev, npins_t, sizeof(*pid_t), GFP_KERNEL);
+ pmux_t = devm_kcalloc(dev, npins_t, sizeof(*pmux_t), GFP_KERNEL);
+ if (!pid_t || !pmux_t) {
+ dev_err(dev, "kalloc memory fail\n");
+ return -ENOMEM;
+ }
+
+ ret = fwnode_property_read_u32_array(fwnode, "pinmux", pmux_t, npins_t);
+ if (ret) {
+ dev_err(dev, "get pinmux value fail\n");
+ goto exit;
+ }
+
+ for (i = 0; i < npins_t; i++) {
+ pid_t[i] = pmux_t[i] >> 8;
+ pmux_t[i] = pmux_t[i] & 0xff;
+ }
+ *pid = pid_t;
+ *pmux = pmux_t;
+ *npins = npins_t;
+
+ return 0;
+exit:
+ devm_kfree(dev, pid_t);
+ devm_kfree(dev, pmux_t);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pinconf_generic_parse_dt_pinmux);
+
+/**
+ * pinconf_generic_parse_dt_config()
+ * parse the config properties into generic pinconfig values.
+ * @np: node containing the pinconfig properties
+ * @pctldev: pincontrol device
+ * @configs: array with nconfigs entries containing the generic pinconf values
+ * must be freed when no longer necessary.
+ * @nconfigs: number of configurations
+ */
+int pinconf_generic_parse_dt_config(struct device_node *np,
+ struct pinctrl_dev *pctldev,
+ unsigned long **configs,
+ unsigned int *nconfigs)
+{
+ unsigned long *cfg;
+ unsigned int max_cfg, ncfg = 0;
+ struct fwnode_handle *fwnode;
+ int ret;
+
+ fwnode = of_fwnode_handle(np);
+ if (!fwnode)
+ return -EINVAL;
+
+ /* allocate a temporary array big enough to hold one of each option */
+ max_cfg = ARRAY_SIZE(dt_params);
+ if (pctldev)
+ max_cfg += pctldev->desc->num_custom_params;
+ cfg = kcalloc(max_cfg, sizeof(*cfg), GFP_KERNEL);
+ if (!cfg)
+ return -ENOMEM;
+
+ ret = parse_fw_cfg(fwnode, dt_params, ARRAY_SIZE(dt_params), cfg, &ncfg);
+ if (ret)
+ goto out;
+ if (pctldev && pctldev->desc->num_custom_params &&
+ pctldev->desc->custom_params) {
+ ret = parse_fw_cfg(fwnode, pctldev->desc->custom_params,
+ pctldev->desc->num_custom_params, cfg, &ncfg);
+ if (ret)
+ goto out;
+ }
+
+ /* no configs found at all */
+ if (ncfg == 0) {
+ *configs = NULL;
+ *nconfigs = 0;
+ goto out;
+ }
+
+ /*
+ * Now limit the number of configs to the real number of
+ * found properties.
+ */
+ *configs = kmemdup_array(cfg, ncfg, sizeof(unsigned long), GFP_KERNEL);
+ if (!*configs) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ *nconfigs = ncfg;
+
+out:
+ kfree(cfg);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pinconf_generic_parse_dt_config);
+
+int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev,
+ struct device_node *np, struct pinctrl_map **map,
+ unsigned int *reserved_maps, unsigned int *num_maps,
+ enum pinctrl_map_type type)
+{
+ int ret;
+ const char *function;
+ struct device *dev = pctldev->dev;
+ unsigned long *configs = NULL;
+ unsigned int num_configs = 0;
+ unsigned int reserve, strings_count;
+ struct property *prop;
+ const char *group;
+ const char *subnode_target_type = "pins";
+
+ ret = of_property_count_strings(np, "pins");
+ if (ret < 0) {
+ ret = of_property_count_strings(np, "groups");
+ if (ret < 0)
+ /* skip this node; may contain config child nodes */
+ return 0;
+ if (type == PIN_MAP_TYPE_INVALID)
+ type = PIN_MAP_TYPE_CONFIGS_GROUP;
+ subnode_target_type = "groups";
+ } else {
+ if (type == PIN_MAP_TYPE_INVALID)
+ type = PIN_MAP_TYPE_CONFIGS_PIN;
+ }
+ strings_count = ret;
+
+ ret = of_property_read_string(np, "function", &function);
+ if (ret < 0) {
+ /* EINVAL=missing, which is fine since it's optional */
+ if (ret != -EINVAL)
+ dev_err(dev, "%pOF: could not parse property function\n",
+ np);
+ function = NULL;
+ }
+
+ ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
+ &num_configs);
+ if (ret < 0) {
+ dev_err(dev, "%pOF: could not parse node property\n", np);
+ return ret;
+ }
+
+ reserve = 0;
+ if (function != NULL)
+ reserve++;
+ if (num_configs)
+ reserve++;
+
+ reserve *= strings_count;
+
+ ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
+ num_maps, reserve);
+ if (ret < 0)
+ goto exit;
+
+ of_property_for_each_string(np, subnode_target_type, prop, group) {
+ if (function) {
+ ret = pinctrl_utils_add_map_mux(pctldev, map,
+ reserved_maps, num_maps, group,
+ function);
+ if (ret < 0)
+ goto exit;
+ }
+
+ if (num_configs) {
+ ret = pinctrl_utils_add_map_configs(pctldev, map,
+ reserved_maps, num_maps, group, configs,
+ num_configs, type);
+ if (ret < 0)
+ goto exit;
+ }
+ }
+ ret = 0;
+
+exit:
+ kfree(configs);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pinconf_generic_dt_subnode_to_map);
+
+int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev,
+ struct device_node *np_config, struct pinctrl_map **map,
+ unsigned int *num_maps, enum pinctrl_map_type type)
+{
+ unsigned int reserved_maps;
+ int ret;
+
+ reserved_maps = 0;
+ *map = NULL;
+ *num_maps = 0;
+
+ ret = pinconf_generic_dt_subnode_to_map(pctldev, np_config, map,
+ &reserved_maps, num_maps, type);
+ if (ret < 0)
+ goto exit;
+
+ for_each_available_child_of_node_scoped(np_config, np) {
+ ret = pinconf_generic_dt_subnode_to_map(pctldev, np, map,
+ &reserved_maps, num_maps, type);
+ if (ret < 0)
+ goto exit;
+ }
+ return 0;
+
+exit:
+ pinctrl_utils_free_map(pctldev, *map, *num_maps);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pinconf_generic_dt_node_to_map);
+
+void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev,
+ struct pinctrl_map *map,
+ unsigned int num_maps)
+{
+ pinctrl_utils_free_map(pctldev, map, num_maps);
+}
+EXPORT_SYMBOL_GPL(pinconf_generic_dt_free_map);
+
+#endif