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authorLinus Torvalds <torvalds@linux-foundation.org>2026-08-24 08:46:03 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2026-08-24 08:46:03 -0700
commitcf9610f9116d55c5a66ef9f1faecacabd93a9322 (patch)
tree757a3d280760c654767631cab5ad8af2d86d1848 /drivers/misc/sram-exec.c
downloadlinux-stable-cf9610f9116d55c5a66ef9f1faecacabd93a9322.tar.gz
linux-stable-cf9610f9116d55c5a66ef9f1faecacabd93a9322.zip
Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlgrafted
Pull pin control updates from Linus Walleij: "Core changes: - Use the non-blocking mux_state_try_select() in the generic MUX pin control back-end - Free pin maps on pinctrl_generic_to_map() failure in the core helpers New hardware pin control: - Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC (this is for the low power audio, LPASS = Low Power Audio SubSystem portions) - Upboard support on top of the Intel pin controller - Apple T6030 and T6031 support (just compatible strings) - Samsung Exynos 8855 SoC - Mediatek MT6858 SoC - Rockchip RK3308B and RV1106 SoCs - Airoha EN7523 and AN7563 SoCs Improvements: - Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable - Qualcomm improvements on top of the Qualcomm PDC (power domain controller) irqchip improvements from tglx:s tree - Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups - The NPCM8xx driver has been put into shape fixing many pin and group definitions - Some non-urgent Tegra 264 pin assignments are fixed up - Some non-urgent fixups to Airoha AN7581 and AN7583 registers and pin assignments, missing features etc" * tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits) dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema pinctrl: meson: sync some modify from A4 pinctrl: meson: a4: Add input enable pin configuration pinctrl: realtek: rtd1625: remove unused group name spdif_sel pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13 dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Revert "Merge branch 'ib-rsk7204' into devel" pinctrl: rockchip: Add RV1106 pinctrl support dt-bindings: pinctrl: rockchip: Add RV1106 compatible pinctrl: rockchip: Decode drive strength in the get function pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable pinctrl: airoha: add support of an7563 SoC dt-bindings: pinctrl: airoha: add support of an7563 pin controller pinctrl: airoha: try to find chip scu node by phandle first pinctrl: airoha: add support of en7523 SoC dt-bindings: pinctrl: airoha: add support of en7523 pin controller pinctrl: airoha: an7583: add support for olt pinmux pinctrl: airoha: an7583: add support for pon_alt pinmux pinctrl: airoha: an7583: add support for npu_uart pinmux dt-bindings: pinctrl: airoha: an7583: add missed features ...
Diffstat (limited to 'drivers/misc/sram-exec.c')
-rw-r--r--drivers/misc/sram-exec.c121
1 files changed, 121 insertions, 0 deletions
diff --git a/drivers/misc/sram-exec.c b/drivers/misc/sram-exec.c
new file mode 100644
index 000000000..b71dbbd73
--- /dev/null
+++ b/drivers/misc/sram-exec.c
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * SRAM protect-exec region helper functions
+ *
+ * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
+ * Dave Gerlach
+ */
+
+#include <linux/device.h>
+#include <linux/genalloc.h>
+#include <linux/mm.h>
+#include <linux/sram.h>
+#include <linux/set_memory.h>
+
+#include <asm/fncpy.h>
+
+#include "sram.h"
+
+static DEFINE_MUTEX(exec_pool_list_mutex);
+static LIST_HEAD(exec_pool_list);
+
+int sram_check_protect_exec(struct sram_dev *sram, struct sram_reserve *block,
+ struct sram_partition *part)
+{
+ unsigned long base = (unsigned long)part->base;
+ unsigned long end = base + block->size;
+
+ if (!PAGE_ALIGNED(base) || !PAGE_ALIGNED(end)) {
+ dev_err(sram->dev,
+ "SRAM pool marked with 'protect-exec' is not page aligned and will not be created.\n");
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+int sram_add_protect_exec(struct sram_partition *part)
+{
+ mutex_lock(&exec_pool_list_mutex);
+ list_add_tail(&part->list, &exec_pool_list);
+ mutex_unlock(&exec_pool_list_mutex);
+
+ return 0;
+}
+
+/**
+ * sram_exec_copy - copy data to a protected executable region of sram
+ *
+ * @pool: struct gen_pool retrieved that is part of this sram
+ * @dst: Destination address for the copy, that must be inside pool
+ * @src: Source address for the data to copy
+ * @size: Size of copy to perform, which starting from dst, must reside in pool
+ *
+ * Return: Address for copied data that can safely be called through function
+ * pointer, or NULL if problem.
+ *
+ * This helper function allows sram driver to act as central control location
+ * of 'protect-exec' pools which are normal sram pools but are always set
+ * read-only and executable except when copying data to them, at which point
+ * they are set to read-write non-executable, to make sure no memory is
+ * writeable and executable at the same time. This region must be page-aligned
+ * and is checked during probe, otherwise page attribute manipulation would
+ * not be possible. Care must be taken to only call the returned address as
+ * dst address is not guaranteed to be safely callable.
+ *
+ * NOTE: This function uses the fncpy macro to move code to the executable
+ * region. Some architectures have strict requirements for relocating
+ * executable code, so fncpy is a macro that must be defined by any arch
+ * making use of this functionality that guarantees a safe copy of exec
+ * data and returns a safe address that can be called as a C function
+ * pointer.
+ */
+void *sram_exec_copy(struct gen_pool *pool, void *dst, void *src,
+ size_t size)
+{
+ struct sram_partition *part = NULL, *p;
+ unsigned long base;
+ int pages;
+ void *dst_cpy;
+ int ret;
+
+ mutex_lock(&exec_pool_list_mutex);
+ list_for_each_entry(p, &exec_pool_list, list) {
+ if (p->pool == pool)
+ part = p;
+ }
+ mutex_unlock(&exec_pool_list_mutex);
+
+ if (!part)
+ return NULL;
+
+ if (!gen_pool_has_addr(pool, (unsigned long)dst, size))
+ return NULL;
+
+ base = (unsigned long)part->base;
+ pages = PAGE_ALIGN(size) / PAGE_SIZE;
+
+ mutex_lock(&part->lock);
+
+ ret = set_memory_nx((unsigned long)base, pages);
+ if (ret)
+ goto error_out;
+ ret = set_memory_rw((unsigned long)base, pages);
+ if (ret)
+ goto error_out;
+
+ dst_cpy = fncpy(dst, src, size);
+
+ ret = set_memory_rox((unsigned long)base, pages);
+ if (ret)
+ goto error_out;
+
+ mutex_unlock(&part->lock);
+
+ return dst_cpy;
+
+error_out:
+ mutex_unlock(&part->lock);
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(sram_exec_copy);