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authorHaojie Li <lihaojie@kylinos.cn>2026-08-25 18:08:45 +0800
committerChun-Kuang Hu <chunkuang.hu@kernel.org>2026-09-28 23:20:55 +0000
commitbce7698e2e6565bb765bd0522337f29f5f312624 (patch)
tree0b735b7b4a27369cb4d75d9431b3ee59ce7e5bcc /drivers/misc/issei/Kconfig
downloadlinux-stable-bce7698e2e6565bb765bd0522337f29f5f312624.tar.gz
linux-stable-bce7698e2e6565bb765bd0522337f29f5f312624.zip
drm/mediatek: Add missing IS_ERR check for ovl_adaptor platform devicegrafted
platform_device_register_data() can fail and return an ERR_PTR, but the return value is used without checking, leading to an invalid pointer being stored in ddp_comp[].dev and passed to component_match_add() and mtk_ddp_comp_init(), which could result in a kernel crash. Add an IS_ERR() check to jump to the error handling path on failure. Fixes: 0d9eee9118b7 ("drm/mediatek: Add drm ovl_adaptor sub driver for MT8195") Cc: stable@vger.kernel.org Signed-off-by: Haojie Li <lihaojie@kylinos.cn> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20260825100845.438893-1-lihaojie@kylinos.cn/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'drivers/misc/issei/Kconfig')
-rw-r--r--drivers/misc/issei/Kconfig29
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/misc/issei/Kconfig b/drivers/misc/issei/Kconfig
new file mode 100644
index 000000000..12a3fd809
--- /dev/null
+++ b/drivers/misc/issei/Kconfig
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (C) 2023-2026 Intel Corporation
+config INTEL_SSEI
+ tristate "Intel Silicon Security Engine Interface"
+ help
+ The ISSEI (Intel Silicon Security Engine Interface)
+ subsystem provides a communication channel between the host and the
+ Silicon Security Engine.
+ Enable this driver to get SPDM and other features on Intel client CPUs
+ released in 2024 (Lunar Lake) or later.
+
+ If selected, the /dev/isseiX device will be created.
+ If in doubt, select N.
+
+if INTEL_SSEI
+
+config INTEL_SSEI_HW_HECI
+ tristate "Intel Silicon Security Engine Interface Hardware"
+ depends on X86 && PCI
+ help
+ HECI interface of communication channel between
+ the host and the Silicon Security Engine.
+
+ Implementation of ISSEI communication channel over
+ the HECI hardware PCI device.
+ This device is available on Intel client CPUs released in 2024
+ (Lunar Lake) or later.
+
+endif