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authorDanilo Krummrich <dakr@kernel.org>2026-08-13 18:52:04 +0200
committerDanilo Krummrich <dakr@kernel.org>2026-08-17 01:41:36 +0200
commitf146c7bc85a51f95c05e0f8173d484eb301ece78 (patch)
tree07296ae54ed6551492b0c609dc0f5463f61f89ca /crypto/sm3.c
downloadlinux-stable-f146c7bc85a51f95c05e0f8173d484eb301ece78.tar.gz
linux-stable-f146c7bc85a51f95c05e0f8173d484eb301ece78.zip
PCI: Add pci_irq_type() to query the allocated interrupt typegrafted
Add a helper that returns PCI_IRQ_MSIX, PCI_IRQ_MSI, or PCI_IRQ_INTX based on the interrupt type the PCI core selected after pci_alloc_irq_vectors(). Several drivers already open-code this check against pdev->msix_enabled and pdev->msi_enabled, or even open code this helper [1]. A common helper avoids the duplication and keeps drivers from accessing the bitfield directly (see also [2]). Acked-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: John Hubbard <jhubbard@nvidia.com> Link: https://elixir.bootlin.com/linux/v7.1/source/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c#L196 [1] Inspired-by: John Hubbard <jhubbard@nvidia.com> Link: https://lore.kernel.org/all/DKKG2QM3YJYB.Z2H2B2UXJ75N@kernel.org/ [2] Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260813165234.620555-5-dakr@kernel.org [ Add missing pci_irq_type() stub for CONFIG_PCI=n. ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
Diffstat (limited to 'crypto/sm3.c')
-rw-r--r--crypto/sm3.c89
1 files changed, 89 insertions, 0 deletions
diff --git a/crypto/sm3.c b/crypto/sm3.c
new file mode 100644
index 000000000..05111a99b
--- /dev/null
+++ b/crypto/sm3.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * SM3 secure hash, as specified by OSCCA GM/T 0004-2012 SM3 and
+ * described at https://tools.ietf.org/html/draft-shen-sm3-hash-01
+ *
+ * Copyright (C) 2017 ARM Limited or its affiliates.
+ * Written by Gilad Ben-Yossef <gilad@benyossef.com>
+ * Copyright (C) 2021 Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
+ * Copyright 2026 Google LLC
+ */
+
+#include <crypto/internal/hash.h>
+#include <crypto/sm3.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+
+#define SM3_CTX(desc) ((struct sm3_ctx *)shash_desc_ctx(desc))
+
+static int crypto_sm3_init(struct shash_desc *desc)
+{
+ sm3_init(SM3_CTX(desc));
+ return 0;
+}
+
+static int crypto_sm3_update(struct shash_desc *desc,
+ const u8 *data, unsigned int len)
+{
+ sm3_update(SM3_CTX(desc), data, len);
+ return 0;
+}
+
+static int crypto_sm3_final(struct shash_desc *desc, u8 *out)
+{
+ sm3_final(SM3_CTX(desc), out);
+ return 0;
+}
+
+static int crypto_sm3_digest(struct shash_desc *desc,
+ const u8 *data, unsigned int len, u8 *out)
+{
+ sm3(data, len, out);
+ return 0;
+}
+
+static int crypto_sm3_export_core(struct shash_desc *desc, void *out)
+{
+ memcpy(out, SM3_CTX(desc), sizeof(struct sm3_ctx));
+ return 0;
+}
+
+static int crypto_sm3_import_core(struct shash_desc *desc, const void *in)
+{
+ memcpy(SM3_CTX(desc), in, sizeof(struct sm3_ctx));
+ return 0;
+}
+
+static struct shash_alg sm3_alg = {
+ .base.cra_name = "sm3",
+ .base.cra_driver_name = "sm3-lib",
+ .base.cra_priority = 300,
+ .base.cra_blocksize = SM3_BLOCK_SIZE,
+ .base.cra_module = THIS_MODULE,
+ .digestsize = SM3_DIGEST_SIZE,
+ .init = crypto_sm3_init,
+ .update = crypto_sm3_update,
+ .final = crypto_sm3_final,
+ .digest = crypto_sm3_digest,
+ .export_core = crypto_sm3_export_core,
+ .import_core = crypto_sm3_import_core,
+ .descsize = sizeof(struct sm3_ctx),
+};
+
+static int __init crypto_sm3_mod_init(void)
+{
+ return crypto_register_shash(&sm3_alg);
+}
+module_init(crypto_sm3_mod_init);
+
+static void __exit crypto_sm3_mod_exit(void)
+{
+ crypto_unregister_shash(&sm3_alg);
+}
+module_exit(crypto_sm3_mod_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Crypto API support for SM3");
+
+MODULE_ALIAS_CRYPTO("sm3");
+MODULE_ALIAS_CRYPTO("sm3-lib");