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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2026-09-05 11:59:05 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2026-09-05 11:59:05 -0700 |
| commit | 9f0346dcbea363787186c94ef94dd01aaa215afa (patch) | |
| tree | b81c168f4d0dbe4c7f4750f4598d48a6deb72094 /arch/sh/lib/div64.S | |
| download | linux-stable-9f0346dcbea363787186c94ef94dd01aaa215afa.tar.gz linux-stable-9f0346dcbea363787186c94ef94dd01aaa215afa.zip | |
Merge tag 'driver-core-7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-coregrafted
Pull driver core fixes from Danilo Krummrich:
- Fix kernfs listxattr() not returning security xattr names (e.g.
SELinux labels) when the kernfs node has no allocated kernfs_iattrs
- Fix silent truncation of IRQ vector indices in the Rust PCI
abstractions
- Don't select OF from DRIVER_PE_KUNIT_TEST; skip the test when OF is
disabled instead of silently enabling extra kernel functionality
- Russ Weight is retiring from kernel development; update the Firmware
Loader sysfs contact to the driver-core mailing list, add a CREDITS
entry for Firmware Upload, and update MAINTAINERS accordingly
* tag 'driver-core-7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core:
MAINTAINERS: Remove Russ Weight from Firmware Loader
CREDITS: Add CREDITS entry for Firmware Upload
firmware_loader: Change contact for sysfs nodes
rust: pci: reject IRQ vector indices that do not fit in u32
kernfs: preserve security xattrs without allocating iattrs
drivers: base: test: DRIVER_PE_KUNIT_TEST should not select OF
Diffstat (limited to 'arch/sh/lib/div64.S')
| -rw-r--r-- | arch/sh/lib/div64.S | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/sh/lib/div64.S b/arch/sh/lib/div64.S new file mode 100644 index 000000000..4a9a966e7 --- /dev/null +++ b/arch/sh/lib/div64.S @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * unsigned long __xdiv64_32(unsigned long long n, unsigned long d); + */ + +#include <linux/linkage.h> + +.text +ENTRY(__xdiv64_32) +#ifdef CONFIG_CPU_LITTLE_ENDIAN + mov r4, r0 + mov r5, r1 +#else + mov r4, r1 + mov r5, r0 +#endif + cmp/hs r6, r1 + bf.s 1f + mov #0, r2 + + mov r1, r2 + mov #0, r3 + div0u + .rept 32 + rotcl r2 + div1 r6, r3 + .endr + rotcl r2 + mul.l r6, r2 + sts macl, r3 + sub r3, r1 +1: + div0u + .rept 32 + rotcl r0 + div1 r6, r1 + .endr +#ifdef CONFIG_CPU_LITTLE_ENDIAN + mov r2, r1 + rts + rotcl r0 +#else + rotcl r0 + mov r0, r1 + rts + mov r2, r0 +#endif |
