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| author | Kees Cook <kees+treewide@kernel.org> | 2026-09-02 15:31:14 -0700 |
|---|---|---|
| committer | Kees Cook <kees@kernel.org> | 2026-09-04 21:37:00 -0700 |
| commit | 3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d (patch) | |
| tree | c65086f9bdcd48c6360fb7cb4598bca084da1f32 /arch/riscv/Kconfig.socs | |
| download | linux-stable-3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d.tar.gz linux-stable-3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d.zip | |
treewide: refresh kmalloc_obj() conversionsgrafted
This is another run of the Coccinelle script for converting kmalloc()
family of allocations to kmalloc_obj() via the existing rules in
scripts/coccinelle/api/kmalloc_objs.cocci
This catches both the set of kmalloc() uses added since the first
kmalloc_obj() conversions in v7.0 and adds a large group missed in the
first pass due to Coccinelle not interacting well with the cleanup.h
scoped_...() family of macros[1]. I worked around this with spatch's
"--macro-file" argument to a file with all the scoped_...() macros mapped
to Coccinelle's YACFE_ITERATOR[2] as that was the closest viable control
flow indicator I could find.
Build tested allmodconfig on x86, arm64, arm, loongarch, mips, powerpc,
riscv, and s390 with no new warnings.
Link: https://lore.kernel.org/lkml/202609021314.8A9C0B8@keescook/ [1]
Link: https://github.com/coccinelle/coccinelle/blob/master/standard.h [2]
Signed-off-by: Kees Cook <kees+treewide@kernel.org>
Diffstat (limited to 'arch/riscv/Kconfig.socs')
| -rw-r--r-- | arch/riscv/Kconfig.socs | 120 |
1 files changed, 120 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs new file mode 100644 index 000000000..429e07589 --- /dev/null +++ b/arch/riscv/Kconfig.socs @@ -0,0 +1,120 @@ +menu "SoC selection" + +config ARCH_ANDES + bool "Andes SoCs" + depends on MMU + select ERRATA_ANDES + help + This enables support for Andes SoC platform hardware. + +config ARCH_ANLOGIC + bool "Anlogic SoCs" + help + This enables support for Anlogic SoC platform hardware. + +config ARCH_ESWIN + bool "ESWIN SoCs" + help + This enables support for ESWIN SoC platform hardware, + including the ESWIN EIC7700 SoC. + +config ARCH_MICROCHIP_POLARFIRE + def_bool ARCH_MICROCHIP + +config ARCH_MICROCHIP + bool "Microchip SoCs" + help + This enables support for Microchip SoC platforms. + +config ARCH_RENESAS + bool "Renesas RISC-V SoCs" + help + This enables support for the RISC-V based Renesas SoCs. + +config ARCH_SIFIVE + bool "SiFive SoCs" + select ERRATA_SIFIVE + help + This enables support for SiFive SoC platform hardware. + +config ARCH_SOPHGO + bool "Sophgo SoCs" + help + This enables support for Sophgo SoC platform hardware. + +config ARCH_SPACEMIT + bool "SpacemiT SoCs" + select PINCTRL + help + This enables support for SpacemiT SoC platform hardware. + +config ARCH_STARFIVE + def_bool SOC_STARFIVE + +config SOC_STARFIVE + bool "StarFive SoCs" + select PINCTRL + select RESET_CONTROLLER + select ARM_AMBA + help + This enables support for StarFive SoC platform hardware. + +config ARCH_SUNXI + bool "Allwinner sun20i SoCs" + depends on MMU + select ERRATA_THEAD + select SUN4I_TIMER + help + This enables support for Allwinner sun20i platform hardware, + including boards based on the D1 and D1s SoCs. + +config ARCH_TENSTORRENT + bool "Tenstorrent SoCs" + help + This enables support for Tenstorrent SoC platforms. + Current support is for Blackhole P100 and P150 PCIe cards. + The Blackhole SoC contains four RISC-V CPU tiles each + consisting of 4x SiFive X280 cores. + +config ARCH_THEAD + bool "T-HEAD RISC-V SoCs" + depends on MMU + select ERRATA_THEAD + select PM_GENERIC_DOMAINS if PM + help + This enables support for the RISC-V based T-HEAD SoCs. + +config ARCH_ULTRARISC + bool "UltraRISC RISC-V SoCs" + help + This enables support for UltraRISC SoC platform hardware, + including boards based on the UR-DP1000. + +config ARCH_VIRT + bool "QEMU Virt Machine" + select POWER_RESET + select POWER_RESET_SYSCON + select POWER_RESET_SYSCON_POWEROFF + select GOLDFISH + select RTC_DRV_GOLDFISH if RTC_CLASS + select PM_GENERIC_DOMAINS if PM + select PM_GENERIC_DOMAINS_OF if PM && OF + select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI + help + This enables support for QEMU Virt Machine. + +config ARCH_CANAAN + bool "Canaan Kendryte SoC" + help + This enables support for Canaan Kendryte series SoC platform hardware. + +config SOC_CANAAN_K210 + bool "Canaan Kendryte K210 SoC" + depends on !MMU && ARCH_CANAAN + select ARCH_HAS_RESET_CONTROLLER + select PINCTRL + select COMMON_CLK + help + This enables support for Canaan Kendryte K210 SoC platform hardware. + +endmenu # "SoC selection" |
