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authorKees Cook <kees+treewide@kernel.org>2026-09-02 15:31:14 -0700
committerKees Cook <kees@kernel.org>2026-09-04 21:37:00 -0700
commit3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d (patch)
treec65086f9bdcd48c6360fb7cb4598bca084da1f32 /arch/powerpc/boot/pq2.c
downloadlinux-stable-3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d.tar.gz
linux-stable-3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d.zip
treewide: refresh kmalloc_obj() conversionsgrafted
This is another run of the Coccinelle script for converting kmalloc() family of allocations to kmalloc_obj() via the existing rules in scripts/coccinelle/api/kmalloc_objs.cocci This catches both the set of kmalloc() uses added since the first kmalloc_obj() conversions in v7.0 and adds a large group missed in the first pass due to Coccinelle not interacting well with the cleanup.h scoped_...() family of macros[1]. I worked around this with spatch's "--macro-file" argument to a file with all the scoped_...() macros mapped to Coccinelle's YACFE_ITERATOR[2] as that was the closest viable control flow indicator I could find. Build tested allmodconfig on x86, arm64, arm, loongarch, mips, powerpc, riscv, and s390 with no new warnings. Link: https://lore.kernel.org/lkml/202609021314.8A9C0B8@keescook/ [1] Link: https://github.com/coccinelle/coccinelle/blob/master/standard.h [2] Signed-off-by: Kees Cook <kees+treewide@kernel.org>
Diffstat (limited to 'arch/powerpc/boot/pq2.c')
-rw-r--r--arch/powerpc/boot/pq2.c99
1 files changed, 99 insertions, 0 deletions
diff --git a/arch/powerpc/boot/pq2.c b/arch/powerpc/boot/pq2.c
new file mode 100644
index 000000000..de27f1c07
--- /dev/null
+++ b/arch/powerpc/boot/pq2.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * PowerQUICC II support functions
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ */
+
+#include "ops.h"
+#include "types.h"
+#include "fsl-soc.h"
+#include "pq2.h"
+#include "stdio.h"
+#include "io.h"
+
+#define PQ2_SCCR (0x10c80/4) /* System Clock Configuration Register */
+#define PQ2_SCMR (0x10c88/4) /* System Clock Mode Register */
+
+static int pq2_corecnf_map[] = {
+ 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, -1,
+ 6, 5, 13, 2, 14, 4, 15, 9, 0, 11, 8, 10, 16, 12, 7, -1
+};
+
+/* Get various clocks from crystal frequency.
+ * Returns zero on failure and non-zero on success.
+ */
+int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq,
+ u32 *timebase, u32 *brgfreq)
+{
+ u32 *immr;
+ u32 sccr, scmr, mainclk, busclk;
+ int corecnf, busdf, plldf, pllmf, dfbrg;
+
+ immr = fsl_get_immr();
+ if (!immr) {
+ printf("pq2_get_clocks: Couldn't get IMMR base.\r\n");
+ return 0;
+ }
+
+ sccr = in_be32(&immr[PQ2_SCCR]);
+ scmr = in_be32(&immr[PQ2_SCMR]);
+
+ dfbrg = sccr & 3;
+ corecnf = (scmr >> 24) & 0x1f;
+ busdf = (scmr >> 20) & 0xf;
+ plldf = (scmr >> 12) & 1;
+ pllmf = scmr & 0xfff;
+
+ mainclk = crystal * (pllmf + 1) / (plldf + 1);
+ busclk = mainclk / (busdf + 1);
+
+ if (sysfreq)
+ *sysfreq = mainclk / 2;
+ if (timebase)
+ *timebase = busclk / 4;
+ if (brgfreq)
+ *brgfreq = mainclk / (1 << ((dfbrg + 1) * 2));
+
+ if (corefreq) {
+ int coremult = pq2_corecnf_map[corecnf];
+
+ if (coremult < 0)
+ *corefreq = mainclk / 2;
+ else if (coremult == 0)
+ return 0;
+ else
+ *corefreq = busclk * coremult / 2;
+ }
+
+ return 1;
+}
+
+/* Set common device tree fields based on the given clock frequencies. */
+void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq)
+{
+ void *node;
+
+ dt_fixup_cpu_clocks(corefreq, timebase, sysfreq);
+
+ node = finddevice("/soc/cpm");
+ if (node)
+ setprop(node, "clock-frequency", &sysfreq, 4);
+
+ node = finddevice("/soc/cpm/brg");
+ if (node)
+ setprop(node, "clock-frequency", &brgfreq, 4);
+}
+
+int pq2_fixup_clocks(u32 crystal)
+{
+ u32 sysfreq, corefreq, timebase, brgfreq;
+
+ if (!pq2_get_clocks(crystal, &sysfreq, &corefreq, &timebase, &brgfreq))
+ return 0;
+
+ pq2_set_clocks(sysfreq, corefreq, timebase, brgfreq);
+ return 1;
+}