Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlgrafted

Pull pin control updates from Linus Walleij:
 "Core changes:

   - Use the non-blocking mux_state_try_select() in the generic MUX pin
     control back-end

   - Free pin maps on pinctrl_generic_to_map() failure in the core
     helpers

  New hardware pin control:

   - Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC
     (this is for the low power audio, LPASS = Low Power Audio SubSystem
     portions)

   - Upboard support on top of the Intel pin controller

   - Apple T6030 and T6031 support (just compatible strings)

   - Samsung Exynos 8855 SoC

   - Mediatek MT6858 SoC

   - Rockchip RK3308B and RV1106 SoCs

   - Airoha EN7523 and AN7563 SoCs

  Improvements:

   - Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable

   - Qualcomm improvements on top of the Qualcomm PDC (power domain
     controller) irqchip improvements from tglx:s tree

   - Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups

   - The NPCM8xx driver has been put into shape fixing many pin and
     group definitions

   - Some non-urgent Tegra 264 pin assignments are fixed up

   - Some non-urgent fixups to Airoha AN7581 and AN7583 registers and
     pin assignments, missing features etc"

* tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits)
  dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema
  pinctrl: meson: sync some modify from A4
  pinctrl: meson: a4: Add input enable pin configuration
  pinctrl: realtek: rtd1625: remove unused group name spdif_sel
  pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13
  dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
  Revert "Merge branch 'ib-rsk7204' into devel"
  pinctrl: rockchip: Add RV1106 pinctrl support
  dt-bindings: pinctrl: rockchip: Add RV1106 compatible
  pinctrl: rockchip: Decode drive strength in the get function
  pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable
  pinctrl: airoha: add support of an7563 SoC
  dt-bindings: pinctrl: airoha: add support of an7563 pin controller
  pinctrl: airoha: try to find chip scu node by phandle first
  pinctrl: airoha: add support of en7523 SoC
  dt-bindings: pinctrl: airoha: add support of en7523 pin controller
  pinctrl: airoha: an7583: add support for olt pinmux
  pinctrl: airoha: an7583: add support for pon_alt pinmux
  pinctrl: airoha: an7583: add support for npu_uart pinmux
  dt-bindings: pinctrl: airoha: an7583: add missed features
  ...

1 files changed, 142 insertions, 0 deletions

diff --git a/arch/m68k/lib/uaccess.c b/arch/m68k/lib/uaccess.c
new file mode 100644
index 000000000..7646e461a
--- /dev/null
+++ b/arch/m68k/lib/uaccess.c
@@ -0,0 +1,142 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/uaccess.h>
+
+unsigned long __generic_copy_from_user(void *to, const void __user *from,
+				       unsigned long n)
+{
+	unsigned long tmp, res;
+
+	asm volatile ("\n"
+		"	tst.l	%0\n"
+		"	jeq	2f\n"
+		"1:	"MOVES".l	(%1)+,%3\n"
+		"	move.l	%3,(%2)+\n"
+		"	subq.l	#1,%0\n"
+		"	jne	1b\n"
+		"2:	btst	#1,%5\n"
+		"	jeq	4f\n"
+		"3:	"MOVES".w	(%1)+,%3\n"
+		"	move.w	%3,(%2)+\n"
+		"4:	btst	#0,%5\n"
+		"	jeq	6f\n"
+		"5:	"MOVES".b	(%1)+,%3\n"
+		"	move.b  %3,(%2)+\n"
+		"6:\n"
+		"	.section .fixup,\"ax\"\n"
+		"	.even\n"
+		"10:	lsl.l	#2,%0\n"
+		"	btst	#1,%5\n"
+		"	jeq	8f\n"
+		"30:	addq.l	#2,%0\n"
+		"8:	btst	#0,%5\n"
+		"	jeq	6b\n"
+		"50:	addq.l	#1,%0\n"
+		"	jra	6b\n"
+		"	.previous\n"
+		"\n"
+		"	.section __ex_table,\"a\"\n"
+		"	.align	4\n"
+		"	.long	1b,10b\n"
+		"	.long	3b,30b\n"
+		"	.long	5b,50b\n"
+		"	.previous"
+		: "=d" (res), "+a" (from), "+a" (to), "=&d" (tmp)
+		: "0" (n / 4), "d" (n & 3));
+
+	return res;
+}
+EXPORT_SYMBOL(__generic_copy_from_user);
+
+unsigned long __generic_copy_to_user(void __user *to, const void *from,
+				     unsigned long n)
+{
+	unsigned long tmp, res;
+
+	asm volatile ("\n"
+		"	tst.l	%0\n"
+		"	jeq	4f\n"
+		"1:	move.l	(%1)+,%3\n"
+		"2:	"MOVES".l	%3,(%2)+\n"
+		"3:	subq.l	#1,%0\n"
+		"	jne	1b\n"
+		"4:	btst	#1,%5\n"
+		"	jeq	6f\n"
+		"	move.w	(%1)+,%3\n"
+		"5:	"MOVES".w	%3,(%2)+\n"
+		"6:	btst	#0,%5\n"
+		"	jeq	8f\n"
+		"	move.b	(%1)+,%3\n"
+		"7:	"MOVES".b  %3,(%2)+\n"
+		"8:\n"
+		"	.section .fixup,\"ax\"\n"
+		"	.even\n"
+		"20:	lsl.l	#2,%0\n"
+		"50:	add.l	%5,%0\n"
+		"	jra	8b\n"
+		"	.previous\n"
+		"\n"
+		"	.section __ex_table,\"a\"\n"
+		"	.align	4\n"
+		"	.long	2b,20b\n"
+		"	.long	3b,20b\n"
+		"	.long	5b,50b\n"
+		"	.long	6b,50b\n"
+		"	.long	7b,50b\n"
+		"	.long	8b,50b\n"
+		"	.previous"
+		: "=d" (res), "+a" (from), "+a" (to), "=&d" (tmp)
+		: "0" (n / 4), "d" (n & 3));
+
+	return res;
+}
+EXPORT_SYMBOL(__generic_copy_to_user);
+
+/*
+ * Zero Userspace
+ */
+
+unsigned long __clear_user(void __user *to, unsigned long n)
+{
+	unsigned long res;
+
+	asm volatile ("\n"
+		"	tst.l	%0\n"
+		"	jeq	3f\n"
+		"1:	"MOVES".l	%2,(%1)+\n"
+		"2:	subq.l	#1,%0\n"
+		"	jne	1b\n"
+		"3:	btst	#1,%4\n"
+		"	jeq	5f\n"
+		"4:	"MOVES".w	%2,(%1)+\n"
+		"5:	btst	#0,%4\n"
+		"	jeq	7f\n"
+		"6:	"MOVES".b	%2,(%1)\n"
+		"7:\n"
+		"	.section .fixup,\"ax\"\n"
+		"	.even\n"
+		"10:	lsl.l	#2,%0\n"
+		"40:	add.l	%4,%0\n"
+		"	jra	7b\n"
+		"	.previous\n"
+		"\n"
+		"	.section __ex_table,\"a\"\n"
+		"	.align	4\n"
+		"	.long	1b,10b\n"
+		"	.long	2b,10b\n"
+		"	.long	4b,40b\n"
+		"	.long	5b,40b\n"
+		"	.long	6b,40b\n"
+		"	.long	7b,40b\n"
+		"	.previous"
+		: "=d" (res), "+a" (to)
+		: "d" (0), "0" (n / 4), "d" (n & 3));
+
+    return res;
+}
+EXPORT_SYMBOL(__clear_user);