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| author | Ali Ahmet Memis <ali@iusegentoo.com> | 2026-08-21 01:45:27 +0000 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2026-08-29 07:32:26 +0100 |
| commit | 78004e9a87f240df03e2f73120d291763c32e0a7 (patch) | |
| tree | 137c22dd795222931b9d2bf2501d37cd766741aa /arch/m68k/coldfire/Makefile | |
| download | linux-stable-78004e9a87f240df03e2f73120d291763c32e0a7.tar.gz linux-stable-78004e9a87f240df03e2f73120d291763c32e0a7.zip | |
openrisc: fix arbitrary kernel memory access via or1k_atomic syscallgrafted
sys_or1k_atomic() (syscall 244 in the "or1k" ABI) takes two user
pointers, v1 and v2, and swaps the words they point to in hand-written
assembly.
l.lwz r29,0(r4)
l.lwz r27,0(r5)
l.sw 0(r4),r27
l.sw 0(r5),r29
The pointers are not checked with access_ok(). The four memory
accesses also have no exception table entries.
A caller passes a kernel address as either pointer, and the syscall
reads from and writes to it directly.
This gives an unprivileged process a kernel read/write primitive. It
overwrites kernel data such as the sys_call_table, gaining code
execution in kernel context.
Check both pointers before entering the critical section. Add fixups
for the four memory accesses so faults on valid but unmapped user
addresses return -EFAULT.
[shorne@gmail.com: fix comment style]
Fixes: 9d02a4283e9c ("OpenRISC: Boot code")
Cc: stable@vger.kernel.org
Signed-off-by: Ali Ahmet Memis <ali@iusegentoo.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/m68k/coldfire/Makefile')
| -rw-r--r-- | arch/m68k/coldfire/Makefile | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/m68k/coldfire/Makefile b/arch/m68k/coldfire/Makefile new file mode 100644 index 000000000..c56bc0dc7 --- /dev/null +++ b/arch/m68k/coldfire/Makefile @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for the m68knommu kernel. +# + +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# ccflags-y := -DTRAP_DBG_INTERRUPT +# asflags-y := -DTRAP_DBG_INTERRUPT +# + +asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 + +obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o entry.o vectors.o +obj-$(CONFIG_M5206) += m5206.o intc.o reset.o +obj-$(CONFIG_M5206e) += m5206.o intc.o reset.o +obj-$(CONFIG_M520x) += m520x.o intc-simr.o reset.o +obj-$(CONFIG_M523x) += m523x.o dma_timer.o intc-2.o reset.o +obj-$(CONFIG_M5249) += m5249.o intc.o intc-5249.o reset.o +obj-$(CONFIG_M525x) += m525x.o intc.o intc-525x.o reset.o +obj-$(CONFIG_M527x) += m527x.o intc-2.o reset.o +obj-$(CONFIG_M5272) += m5272.o intc-5272.o +obj-$(CONFIG_M528x) += m528x.o intc-2.o reset.o +obj-$(CONFIG_M5307) += m5307.o intc.o reset.o +obj-$(CONFIG_M53xx) += m53xx.o intc-simr.o reset.o +obj-$(CONFIG_M5407) += m5407.o intc.o reset.o +obj-$(CONFIG_M54xx) += m54xx.o intc-2.o +obj-$(CONFIG_M5441x) += m5441x.o intc-simr.o reset.o + +obj-$(CONFIG_COLDFIRE_PIT_TIMER) += pit.o +obj-$(CONFIG_COLDFIRE_TIMERS) += timers.o +obj-$(CONFIG_COLDFIRE_SLTIMERS) += sltimers.o + +obj-$(CONFIG_NETtel) += nettel.o +obj-$(CONFIG_CLEOPATRA) += nettel.o +obj-$(CONFIG_FIREBEE) += firebee.o +obj-$(CONFIG_MCF8390) += mcf8390.o +obj-$(CONFIG_AMCORE) += amcore.o +obj-$(CONFIG_STMARK2) += stmark2.o + +obj-$(CONFIG_PCI) += pci.o + +obj-y += gpio.o +obj-y += head.o |
