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authorKees Cook <kees+treewide@kernel.org>2026-09-02 15:31:14 -0700
committerKees Cook <kees@kernel.org>2026-09-04 21:37:00 -0700
commit3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d (patch)
treec65086f9bdcd48c6360fb7cb4598bca084da1f32 /arch/arm/mach-sti
downloadlinux-stable-3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d.tar.gz
linux-stable-3a2c4d55e32ad65efebdb6de44eef3bfa08bb49d.zip
treewide: refresh kmalloc_obj() conversionsgrafted
This is another run of the Coccinelle script for converting kmalloc() family of allocations to kmalloc_obj() via the existing rules in scripts/coccinelle/api/kmalloc_objs.cocci This catches both the set of kmalloc() uses added since the first kmalloc_obj() conversions in v7.0 and adds a large group missed in the first pass due to Coccinelle not interacting well with the cleanup.h scoped_...() family of macros[1]. I worked around this with spatch's "--macro-file" argument to a file with all the scoped_...() macros mapped to Coccinelle's YACFE_ITERATOR[2] as that was the closest viable control flow indicator I could find. Build tested allmodconfig on x86, arm64, arm, loongarch, mips, powerpc, riscv, and s390 with no new warnings. Link: https://lore.kernel.org/lkml/202609021314.8A9C0B8@keescook/ [1] Link: https://github.com/coccinelle/coccinelle/blob/master/standard.h [2] Signed-off-by: Kees Cook <kees+treewide@kernel.org>
Diffstat (limited to 'arch/arm/mach-sti')
-rw-r--r--arch/arm/mach-sti/Kconfig39
-rw-r--r--arch/arm/mach-sti/Makefile3
-rw-r--r--arch/arm/mach-sti/board-dt.c27
-rw-r--r--arch/arm/mach-sti/platsmp.c100
-rw-r--r--arch/arm/mach-sti/smp.h16
5 files changed, 185 insertions, 0 deletions
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
new file mode 100644
index 000000000..e58699e13
--- /dev/null
+++ b/arch/arm/mach-sti/Kconfig
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: GPL-2.0-only
+menuconfig ARCH_STI
+ bool "STMicroelectronics Consumer Electronics SOCs"
+ depends on ARCH_MULTI_V7
+ select ARM_GIC
+ select ST_IRQCHIP
+ select ARM_GLOBAL_TIMER
+ select CLKSRC_ST_LPC
+ select PINCTRL
+ select PINCTRL_ST
+ select MFD_SYSCON
+ select ARCH_HAS_RESET_CONTROLLER
+ select HAVE_ARM_SCU if SMP
+ select GPIOLIB
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_764369 if SMP
+ select ARM_ERRATA_775420
+ select PL310_ERRATA_753970 if CACHE_L2X0
+ select PL310_ERRATA_769419 if CACHE_L2X0
+ select RESET_CONTROLLER
+ help
+ Include support for STMicroelectronics' STiH407/10 and
+ STiH418 family SoCs using the Device Tree for discovery. More
+ information can be found in Documentation/arch/arm/sti/ and
+ Documentation/devicetree.
+
+if ARCH_STI
+
+config SOC_STIH407
+ bool "STiH407 STMicroelectronics Consumer Electronics family"
+ default y
+ select STIH407_RESET
+ help
+ This enables support for STMicroelectronics Digital Consumer
+ Electronics family StiH407 parts, targetted at set-top-box
+ and other digital audio/video applications using Flattened Device
+ Trees.
+
+endif
diff --git a/arch/arm/mach-sti/Makefile b/arch/arm/mach-sti/Makefile
new file mode 100644
index 000000000..7e2a58257
--- /dev/null
+++ b/arch/arm/mach-sti/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_SMP) += platsmp.o
+obj-$(CONFIG_ARCH_STI) += board-dt.o
diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c
new file mode 100644
index 000000000..1aaf61184
--- /dev/null
+++ b/arch/arm/mach-sti/board-dt.c
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2013 STMicroelectronics (R&D) Limited.
+ * Author(s): Srinivas Kandagatla <srinivas.kandagatla@st.com>
+ */
+
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/mach/arch.h>
+
+#include "smp.h"
+
+static const char *const stih41x_dt_match[] __initconst = {
+ "st,stih407",
+ "st,stih410",
+ "st,stih418",
+ NULL
+};
+
+DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
+ .dt_compat = stih41x_dt_match,
+ .l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE |
+ L310_AUX_CTRL_DATA_PREFETCH |
+ L310_AUX_CTRL_INSTR_PREFETCH |
+ L2C_AUX_CTRL_WAY_SIZE(4),
+ .l2c_aux_mask = 0xc0000fff,
+ .smp = smp_ops(sti_smp_ops),
+MACHINE_END
diff --git a/arch/arm/mach-sti/platsmp.c b/arch/arm/mach-sti/platsmp.c
new file mode 100644
index 000000000..e2ba04b56
--- /dev/null
+++ b/arch/arm/mach-sti/platsmp.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * arch/arm/mach-sti/platsmp.c
+ *
+ * Copyright (C) 2013 STMicroelectronics (R&D) Limited.
+ * http://www.st.com
+ *
+ * Cloned from linux/arch/arm/mach-vexpress/platsmp.c
+ *
+ * Copyright (C) 2002 ARM Ltd.
+ * All Rights Reserved
+ */
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/smp.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/memblock.h>
+
+#include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
+#include <asm/smp_scu.h>
+
+#include "smp.h"
+
+static u32 __iomem *cpu_strt_ptr;
+
+static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ unsigned long entry_pa = __pa_symbol(secondary_startup);
+
+ /*
+ * Secondary CPU is initialised and started by a U-BOOTROM firmware.
+ * Secondary CPU is spinning and waiting for a write at cpu_strt_ptr.
+ * Writing secondary_startup address at cpu_strt_ptr makes it to
+ * jump directly to secondary_startup().
+ */
+ __raw_writel(entry_pa, cpu_strt_ptr);
+
+ /* wmb so that data is actually written before cache flush is done */
+ smp_wmb();
+ sync_cache_w(cpu_strt_ptr);
+
+ return 0;
+}
+
+static void __init sti_smp_prepare_cpus(unsigned int max_cpus)
+{
+ struct device_node *np;
+ void __iomem *scu_base;
+ u32 release_phys;
+ int cpu;
+
+ np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
+
+ if (np) {
+ scu_base = of_iomap(np, 0);
+ scu_enable(scu_base);
+ of_node_put(np);
+ }
+
+ if (max_cpus <= 1)
+ return;
+
+ for_each_possible_cpu(cpu) {
+
+ np = of_get_cpu_node(cpu, NULL);
+
+ if (!np)
+ continue;
+
+ if (of_property_read_u32(np, "cpu-release-addr",
+ &release_phys)) {
+ pr_err("CPU %d: missing or invalid cpu-release-addr "
+ "property\n", cpu);
+ continue;
+ }
+
+ /*
+ * cpu-release-addr is usually configured in SBC DMEM but can
+ * also be in RAM.
+ */
+
+ if (!memblock_is_memory(release_phys))
+ cpu_strt_ptr =
+ ioremap(release_phys, sizeof(release_phys));
+ else
+ cpu_strt_ptr =
+ (u32 __iomem *)phys_to_virt(release_phys);
+
+ set_cpu_possible(cpu, true);
+ }
+}
+
+const struct smp_operations sti_smp_ops __initconst = {
+ .smp_prepare_cpus = sti_smp_prepare_cpus,
+ .smp_boot_secondary = sti_boot_secondary,
+};
diff --git a/arch/arm/mach-sti/smp.h b/arch/arm/mach-sti/smp.h
new file mode 100644
index 000000000..23e929d83
--- /dev/null
+++ b/arch/arm/mach-sti/smp.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * arch/arm/mach-sti/smp.h
+ *
+ * Copyright (C) 2013 STMicroelectronics (R&D) Limited.
+ * http://www.st.com
+ */
+
+#ifndef __MACH_STI_SMP_H
+#define __MACH_STI_SMP_H
+
+extern const struct smp_operations sti_smp_ops;
+
+void sti_secondary_startup(void);
+
+#endif