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authorDapeng Mi <dapeng1.mi@linux.intel.com>2026-09-17 09:52:33 +0800
committerIngo Molnar <mingo@kernel.org>2026-09-22 11:37:46 +0200
commit0102c8c7fdfc4bd700971daff2b94470f4eafae4 (patch)
tree531306c2299f9a269f0a986e29f17ba972180104 /arch/arm/mach-imx/mx31.h
downloadlinux-stable-0102c8c7fdfc4bd700971daff2b94470f4eafae4.tar.gz
linux-stable-0102c8c7fdfc4bd700971daff2b94470f4eafae4.zip
perf/x86/intel: Rename DMR offcore_rsp attribute to offmodule_rspgrafted
DMR introduces Offmodule Response events in place of the legacy Offcore Response events, but it still exposes the inherited offcore_rsp PMU attribute for programming the corresponding MSR data. Rename the DMR PMU attribute to offmodule_rsp so the sysfs interface matches the underlying event name and avoids user & tooling confusion. Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://patch.msgid.link/20260917015234.981153-12-dapeng1.mi@linux.intel.com
Diffstat (limited to 'arch/arm/mach-imx/mx31.h')
-rw-r--r--arch/arm/mach-imx/mx31.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mx31.h b/arch/arm/mach-imx/mx31.h
new file mode 100644
index 000000000..08a72e25c
--- /dev/null
+++ b/arch/arm/mach-imx/mx31.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __MACH_MX31_H__
+#define __MACH_MX31_H__
+
+#define MX31_AIPS1_BASE_ADDR 0x43f00000
+#define MX31_AIPS1_SIZE SZ_1M
+#define MX31_SPBA0_BASE_ADDR 0x50000000
+#define MX31_SPBA0_SIZE SZ_1M
+#define MX31_AIPS2_BASE_ADDR 0x53f00000
+#define MX31_AIPS2_SIZE SZ_1M
+#define MX31_AVIC_BASE_ADDR 0x68000000
+#define MX31_AVIC_SIZE SZ_1M
+#define MX31_X_MEMC_BASE_ADDR 0xb8000000
+#define MX31_X_MEMC_SIZE SZ_64K
+
+#define MX31_IO_P2V(x) IMX_IO_P2V(x)
+
+#endif /* ifndef __MACH_MX31_H__ */