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| author | Tejun Heo <tj@kernel.org> | 2026-09-14 22:12:34 -1000 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2026-09-15 06:57:20 -1000 |
| commit | a9e3760b0838299649c0d57cca44daaf40ba3c33 (patch) | |
| tree | 95807ff0e511c05602ef34808cfc660303309057 /arch/arm/lib/findbit.S | |
| download | linux-stable-a9e3760b0838299649c0d57cca44daaf40ba3c33.tar.gz linux-stable-a9e3760b0838299649c0d57cca44daaf40ba3c33.zip | |
sched_ext: Maintain an online cid mask in the scheduler arenagrafted
Schedulers on the default cid mapping treat [0, nr_online_cids) as the
online set and restart on hotplug. Schedulers that install their own mapping
with scx_bpf_cid_override() have no way to learn which cids are online: the
count no longer identifies members and the CPU-form cpumask is unusable from
cid programs. This is an obvious hole in the cid API.
Add scx_bpf_online_cmask(), a kernel-maintained cmask in the scheduler's
arena, allocated alongside the per-CPU scratch masks and populated after the
cid mapping is finalized and before ops.init(), for child schedulers too.
The pointer stays valid through ops.exit() with no reference to take. It is
the arena offset as a void pointer, the same form struct_ops arena arguments
arrive in. The verifier types the void return as a scalar for the program's
arena cast.
The mask follows the SCX hotplug notifications: seeded from cpu_active_mask
and updated before ops.cid_online/offline() runs, so it lags cpu_online_mask
only inside a hotplug transition. Updates walk the scheduler list under the
lock that also serializes unlinking. Reads are live, not atomic snapshots.
Root initialization excludes hotplug.
v2: Reworded the getter kerneldoc (Andrea Righi).
Signed-off-by: Tejun Heo <tj@kernel.org>
Reviewed-by: Andrea Righi <arighi@nvidia.com>
Diffstat (limited to 'arch/arm/lib/findbit.S')
| -rw-r--r-- | arch/arm/lib/findbit.S | 139 |
1 files changed, 139 insertions, 0 deletions
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S new file mode 100644 index 000000000..b7ac2d3c0 --- /dev/null +++ b/arch/arm/lib/findbit.S @@ -0,0 +1,139 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * linux/arch/arm/lib/findbit.S + * + * Copyright (C) 1995-2000 Russell King + * + * 16th March 2001 - John Ripley <jripley@sonicblue.com> + * Fixed so that "size" is an exclusive not an inclusive quantity. + * All users of these functions expect exclusive sizes, and may + * also call with zero size. + * Reworked by rmk. + */ +#include <linux/linkage.h> +#include <asm/assembler.h> +#include <asm/unwind.h> + .text + +#ifdef __ARMEB__ +#define SWAB_ENDIAN le +#else +#define SWAB_ENDIAN be +#endif + + .macro find_first, endian, set, name +ENTRY(_find_first_\name\()bit_\endian) + UNWIND( .fnstart) + teq r1, #0 + beq 3f + mov r2, #0 +1: ldr r3, [r0], #4 + .ifeq \set + mvns r3, r3 @ invert/test bits + .else + movs r3, r3 @ test bits + .endif + .ifc \endian, SWAB_ENDIAN + bne .L_found_swab + .else + bne .L_found @ found the bit? + .endif + add r2, r2, #32 @ next index +2: cmp r2, r1 @ any more? + blo 1b +3: mov r0, r1 @ no more bits + ret lr + UNWIND( .fnend) +ENDPROC(_find_first_\name\()bit_\endian) + .endm + + .macro find_next, endian, set, name +ENTRY(_find_next_\name\()bit_\endian) + UNWIND( .fnstart) + cmp r2, r1 + bhs 3b + mov ip, r2, lsr #5 @ word index + add r0, r0, ip, lsl #2 + ands ip, r2, #31 @ bit position + beq 1b + ldr r3, [r0], #4 + .ifeq \set + mvn r3, r3 @ invert bits + .endif + .ifc \endian, SWAB_ENDIAN + rev_l r3, ip + .if .Lrev_l_uses_tmp + @ we need to recompute ip because rev_l will have overwritten + @ it. + and ip, r2, #31 @ bit position + .endif + .endif + movs r3, r3, lsr ip @ shift off unused bits + bne .L_found + orr r2, r2, #31 @ no zero bits + add r2, r2, #1 @ align bit pointer + b 2b @ loop for next bit + UNWIND( .fnend) +ENDPROC(_find_next_\name\()bit_\endian) + .endm + + .macro find_bit, endian, set, name + find_first \endian, \set, \name + find_next \endian, \set, \name + .endm + +/* _find_first_zero_bit_le and _find_next_zero_bit_le */ + find_bit le, 0, zero_ + +/* _find_first_bit_le and _find_next_bit_le */ + find_bit le, 1 + +#ifdef __ARMEB__ + +/* _find_first_zero_bit_be and _find_next_zero_bit_be */ + find_bit be, 0, zero_ + +/* _find_first_bit_be and _find_next_bit_be */ + find_bit be, 1 + +#endif + +/* + * One or more bits in the LSB of r3 are assumed to be set. + */ +.L_found_swab: + UNWIND( .fnstart) + rev_l r3, ip +.L_found: +#if __LINUX_ARM_ARCH__ >= 7 + rbit r3, r3 @ reverse bits + clz r3, r3 @ count high zero bits + add r0, r2, r3 @ add offset of first set bit +#elif __LINUX_ARM_ARCH__ >= 5 + rsb r0, r3, #0 + and r3, r3, r0 @ mask out lowest bit set + clz r3, r3 @ count high zero bits + rsb r3, r3, #31 @ offset of first set bit + add r0, r2, r3 @ add offset of first set bit +#else + mov ip, #~0 + tst r3, ip, lsr #16 @ test bits 0-15 + addeq r2, r2, #16 + moveq r3, r3, lsr #16 + tst r3, #0x00ff + addeq r2, r2, #8 + moveq r3, r3, lsr #8 + tst r3, #0x000f + addeq r2, r2, #4 + moveq r3, r3, lsr #4 + tst r3, #0x0003 + addeq r2, r2, #2 + moveq r3, r3, lsr #2 + tst r3, #0x0001 + addeq r2, r2, #1 + mov r0, r2 +#endif + cmp r1, r0 @ Clamp to maxbit + movlo r0, r1 + ret lr + UNWIND( .fnend) |
