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authorLinus Torvalds <torvalds@linux-foundation.org>2026-08-24 08:46:03 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2026-08-24 08:46:03 -0700
commitcf9610f9116d55c5a66ef9f1faecacabd93a9322 (patch)
tree757a3d280760c654767631cab5ad8af2d86d1848 /arch/alpha/lib/stacktrace.c
downloadlinux-stable-cf9610f9116d55c5a66ef9f1faecacabd93a9322.tar.gz
linux-stable-cf9610f9116d55c5a66ef9f1faecacabd93a9322.zip
Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlgrafted
Pull pin control updates from Linus Walleij: "Core changes: - Use the non-blocking mux_state_try_select() in the generic MUX pin control back-end - Free pin maps on pinctrl_generic_to_map() failure in the core helpers New hardware pin control: - Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC (this is for the low power audio, LPASS = Low Power Audio SubSystem portions) - Upboard support on top of the Intel pin controller - Apple T6030 and T6031 support (just compatible strings) - Samsung Exynos 8855 SoC - Mediatek MT6858 SoC - Rockchip RK3308B and RV1106 SoCs - Airoha EN7523 and AN7563 SoCs Improvements: - Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable - Qualcomm improvements on top of the Qualcomm PDC (power domain controller) irqchip improvements from tglx:s tree - Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups - The NPCM8xx driver has been put into shape fixing many pin and group definitions - Some non-urgent Tegra 264 pin assignments are fixed up - Some non-urgent fixups to Airoha AN7581 and AN7583 registers and pin assignments, missing features etc" * tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits) dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema pinctrl: meson: sync some modify from A4 pinctrl: meson: a4: Add input enable pin configuration pinctrl: realtek: rtd1625: remove unused group name spdif_sel pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13 dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Revert "Merge branch 'ib-rsk7204' into devel" pinctrl: rockchip: Add RV1106 pinctrl support dt-bindings: pinctrl: rockchip: Add RV1106 compatible pinctrl: rockchip: Decode drive strength in the get function pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable pinctrl: airoha: add support of an7563 SoC dt-bindings: pinctrl: airoha: add support of an7563 pin controller pinctrl: airoha: try to find chip scu node by phandle first pinctrl: airoha: add support of en7523 SoC dt-bindings: pinctrl: airoha: add support of en7523 pin controller pinctrl: airoha: an7583: add support for olt pinmux pinctrl: airoha: an7583: add support for pon_alt pinmux pinctrl: airoha: an7583: add support for npu_uart pinmux dt-bindings: pinctrl: airoha: an7583: add missed features ...
Diffstat (limited to 'arch/alpha/lib/stacktrace.c')
-rw-r--r--arch/alpha/lib/stacktrace.c103
1 files changed, 103 insertions, 0 deletions
diff --git a/arch/alpha/lib/stacktrace.c b/arch/alpha/lib/stacktrace.c
new file mode 100644
index 000000000..2b1176dd5
--- /dev/null
+++ b/arch/alpha/lib/stacktrace.c
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <linux/kernel.h>
+
+typedef unsigned int instr;
+
+#define MAJOR_OP 0xfc000000
+#define LDA_OP 0x20000000
+#define STQ_OP 0xb4000000
+#define BR_OP 0xc0000000
+
+#define STK_ALLOC_1 0x23de8000 /* lda $30,-X($30) */
+#define STK_ALLOC_1M 0xffff8000
+#define STK_ALLOC_2 0x43c0153e /* subq $30,X,$30 */
+#define STK_ALLOC_2M 0xffe01fff
+
+#define MEM_REG 0x03e00000
+#define MEM_BASE 0x001f0000
+#define MEM_OFF 0x0000ffff
+#define MEM_OFF_SIGN 0x00008000
+#define BASE_SP 0x001e0000
+
+#define STK_ALLOC_MATCH(INSTR) \
+ (((INSTR) & STK_ALLOC_1M) == STK_ALLOC_1 \
+ || ((INSTR) & STK_ALLOC_2M) == STK_ALLOC_2)
+#define STK_PUSH_MATCH(INSTR) \
+ (((INSTR) & (MAJOR_OP | MEM_BASE | MEM_OFF_SIGN)) == (STQ_OP | BASE_SP))
+#define MEM_OP_OFFSET(INSTR) \
+ (((long)((INSTR) & MEM_OFF) << 48) >> 48)
+#define MEM_OP_REG(INSTR) \
+ (((INSTR) & MEM_REG) >> 22)
+
+/* Branches, jumps, PAL calls, and illegal opcodes end a basic block. */
+#define BB_END(INSTR) \
+ (((instr)(INSTR) >= BR_OP) | ((instr)(INSTR) < LDA_OP) | \
+ ((((instr)(INSTR) ^ 0x60000000) < 0x20000000) & \
+ (((instr)(INSTR) & 0x0c000000) != 0)))
+
+#define IS_KERNEL_TEXT(PC) ((unsigned long)(PC) > START_ADDR)
+
+static char reg_name[][4] = {
+ "v0 ", "t0 ", "t1 ", "t2 ", "t3 ", "t4 ", "t5 ", "t6 ", "t7 ",
+ "s0 ", "s1 ", "s2 ", "s3 ", "s4 ", "s5 ", "s6 ", "a0 ", "a1 ",
+ "a2 ", "a3 ", "a4 ", "a5 ", "t8 ", "t9 ", "t10", "t11", "ra ",
+ "pv ", "at ", "gp ", "sp ", "0"
+};
+
+
+static instr *
+display_stored_regs(instr * pro_pc, unsigned char * sp)
+{
+ instr * ret_pc = 0;
+ int reg;
+ unsigned long value;
+
+ printk("Prologue [<%p>], Frame %p:\n", pro_pc, sp);
+ while (!BB_END(*pro_pc))
+ if (STK_PUSH_MATCH(*pro_pc)) {
+ reg = (*pro_pc & MEM_REG) >> 21;
+ value = *(unsigned long *)(sp + (*pro_pc & MEM_OFF));
+ if (reg == 26)
+ ret_pc = (instr *)value;
+ printk("\t\t%s / 0x%016lx\n", reg_name[reg], value);
+ }
+ return ret_pc;
+}
+
+static instr *
+seek_prologue(instr * pc)
+{
+ while (!STK_ALLOC_MATCH(*pc))
+ --pc;
+ while (!BB_END(*(pc - 1)))
+ --pc;
+ return pc;
+}
+
+static long
+stack_increment(instr * prologue_pc)
+{
+ while (!STK_ALLOC_MATCH(*prologue_pc))
+ ++prologue_pc;
+
+ /* Count the bytes allocated. */
+ if ((*prologue_pc & STK_ALLOC_1M) == STK_ALLOC_1M)
+ return -(((long)(*prologue_pc) << 48) >> 48);
+ else
+ return (*prologue_pc >> 13) & 0xff;
+}
+
+void
+stacktrace(void)
+{
+ instr * ret_pc;
+ instr * prologue = (instr *)stacktrace;
+ unsigned char *sp = (unsigned char *)current_stack_pointer;
+
+ printk("\tstack trace:\n");
+ do {
+ ret_pc = display_stored_regs(prologue, sp);
+ sp += stack_increment(prologue);
+ prologue = seek_prologue(ret_pc);
+ } while (IS_KERNEL_TEXT(ret_pc));
+}