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authorLinus Torvalds <torvalds@linux-foundation.org>2026-08-23 13:28:57 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2026-08-23 13:28:57 -0700
commit4352b8aee98005853aa63f57d6377282de17a33f (patch)
tree27614d7a9ef05c32d089004e104364ce42324837 /Documentation/devicetree/bindings/eeprom
downloadlinux-stable-4352b8aee98005853aa63f57d6377282de17a33f.tar.gz
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Merge tag 'i3c/for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linuxgrafted
Pull I3C updates from Alexandre Belloni: "A new driver this cycle, for the AMD AXI I3C controller. There are also new features such as IBI wakeup support, SETAASA device discovery and ACPI support for the the DAA methods, meaning we can now communicate with the SPD devices on DDR5 modules. New driver: - AMD AXI I3C master controller Subsystem: - I3C Common Command Code (CCC) handling improvements, especially around GET CCCs - SETAASA device discovery support - ACPI support for all existing DAA methods like SETDASA, SETNEWDA as well as I2C devices on I3C bus - IBI-based wakeup support Drivers: - dw: SETAASA support - mipi-i3c-hci: advertise IBI wakeup capability, AMD_PT I3C controller support, PIO queue management support for HCI v1.2 - renesas: improve suspend to RAM support, add runtime PM support" * tag 'i3c/for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux: (70 commits) i3c: dw: reduce do_daa time if there's no client i3c: mipi-i3c-hci: Add support for AMD_PT I3C controller i3c: mipi-i3c-hci: Add PIO queue management support for HCI v1.2 i3c: mipi-i3c-hci: Fix missing STAT_IBI_STATUS_THLD in PIO mode i3c: dw: rename "pclk" to "apb" to match dt-binding i3c: dw: make struct dw_i3c_cmd smaller i3c: dw: use COMMAND_PORT_TRANSFER_ARG instead of hardcoding i3c: renesas: Don't register devices when ENTDAA times out i3c: master: dw-i3c-master: fix OD timing for first broadcast i3c: mipi-i3c-hci: Advertise IBI wakeup capability i3c: mipi-i3c-hci: Factor out i3c_hci_sysdev() i3c: mipi-i3c-hci-pci: Propagate I3C wakeup requirements to PCI i3c: master: Reject IBI requests from non-IBI-capable devices i3c: master: Add helper to query bus wakeup requirements i3c: master: Report wakeup events for IBIs i3c: master: Support IBI-based wakeup capability i3c: master: Fix potential UAF in i3c_device_match() i3c: master: Fix potential UAF in i3c_device_uevent() i3c: Make dev->desc locking assumptions explicit i3c: master: Fix use-after-free of master->this ...
Diffstat (limited to 'Documentation/devicetree/bindings/eeprom')
-rw-r--r--Documentation/devicetree/bindings/eeprom/at24.yaml236
-rw-r--r--Documentation/devicetree/bindings/eeprom/at25.yaml159
-rw-r--r--Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml70
-rw-r--r--Documentation/devicetree/bindings/eeprom/st,m24lr.yaml52
4 files changed, 517 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml
new file mode 100644
index 000000000..ef88f4692
--- /dev/null
+++ b/Documentation/devicetree/bindings/eeprom/at24.yaml
@@ -0,0 +1,236 @@
+# SPDX-License-Identifier: GPL-2.0-only
+# Copyright 2019 BayLibre SAS
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/eeprom/at24.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: I2C EEPROMs compatible with Atmel's AT24
+
+maintainers:
+ - Bartosz Golaszewski <bgolaszewski@baylibre.com>
+
+allOf:
+ - $ref: /schemas/nvmem/nvmem.yaml
+ - $ref: /schemas/nvmem/nvmem-deprecated-cells.yaml
+
+select:
+ properties:
+ compatible:
+ contains:
+ anyOf:
+ - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
+ - enum: ["microchip,24aa025e48", "microchip,24aa025e64"]
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^eeprom@[0-9a-f]{1,2}$"
+
+ # There are multiple known vendors who manufacture EEPROM chips compatible
+ # with Atmel's AT24. The compatible string requires either a single item
+ # if the memory comes from Atmel (in which case the vendor part must be
+ # 'atmel') or two items with the same 'model' part where the vendor part of
+ # the first one is the actual manufacturer and the second item is the
+ # corresponding 'atmel,<model>' from Atmel.
+ compatible:
+ oneOf:
+ - allOf:
+ - minItems: 1
+ items:
+ - pattern: "^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$"
+ - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
+ - oneOf:
+ - items:
+ pattern: c00$
+ - items:
+ pattern: c01$
+ - items:
+ pattern: cs01$
+ - items:
+ pattern: c02$
+ - items:
+ pattern: cs02$
+ - items:
+ pattern: mac402$
+ - items:
+ pattern: mac602$
+ - items:
+ pattern: c04$
+ - items:
+ pattern: cs04$
+ - items:
+ pattern: c08$
+ - items:
+ pattern: cs08$
+ - items:
+ pattern: c16$
+ - items:
+ pattern: cs16$
+ - items:
+ pattern: c32$
+ - items:
+ pattern: cs32$
+ - items:
+ pattern: c64$
+ - items:
+ pattern: cs64$
+ - items:
+ pattern: c128$
+ - items:
+ pattern: cs128$
+ - items:
+ pattern: c256$
+ - items:
+ pattern: cs256$
+ - items:
+ pattern: c512$
+ - items:
+ pattern: cs512$
+ - items:
+ pattern: c1024$
+ - items:
+ pattern: cs1024$
+ - items:
+ pattern: c1025$
+ - items:
+ pattern: cs1025$
+ - items:
+ pattern: c2048$
+ - items:
+ pattern: cs2048$
+ - items:
+ pattern: spd$
+ # These are special cases that don't conform to the above pattern.
+ # Each requires a standard at24 model as fallback.
+ - items:
+ - enum:
+ - rohm,br24g01
+ - rohm,br24t01
+ - const: atmel,24c01
+ - items:
+ - enum:
+ - nxp,se97b
+ - renesas,r1ex24002
+ - const: atmel,24c02
+ - items:
+ - enum:
+ - belling,bl24c04a
+ - giantec,gt24c04a
+ - onnn,cat24c04
+ - onnn,cat24c05
+ - rohm,br24g04
+ - const: atmel,24c04
+ - items:
+ - enum:
+ - belling,bl24c16a
+ - belling,bl24c16f
+ - renesas,r1ex24016
+ - const: atmel,24c16
+ - items:
+ - const: giantec,gt24c32a
+ - const: atmel,24c32
+ - items:
+ - enum:
+ - belling,bl24s64
+ - giantec,gt24p64a
+ - onnn,n24s64b
+ - puya,p24c64f
+ - const: atmel,24c64
+ - items:
+ - enum:
+ - giantec,gt24p128e
+ - giantec,gt24p128f
+ - puya,p24c128f
+ - renesas,r1ex24128
+ - samsung,s524ad0xd1
+ - const: atmel,24c128
+ - items:
+ - enum:
+ - giantec,gt24c256c
+ - puya,p24c256c
+ - const: atmel,24c256
+ - items:
+ - const: microchip,24aa025e48
+ - items:
+ - const: microchip,24aa025e64
+ - items:
+ - const: st,24256e-wl
+ - pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st
+
+ label:
+ description: Descriptive name of the EEPROM.
+
+ reg:
+ maxItems: 1
+
+ pagesize:
+ description:
+ The length of the pagesize for writing. Please consult the
+ manual of your device, that value varies a lot. A wrong value
+ may result in data loss! If not specified, a safety value of
+ '1' is used which will be very slow.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 8, 16, 32, 64, 128, 256]
+ default: 1
+
+ read-only:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Disables writes to the eeprom.
+
+ size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Total eeprom size in bytes.
+
+ no-read-rollover:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Indicates that the multi-address eeprom does not automatically roll
+ over reads to the next slave address. Please consult the manual of
+ your device.
+
+ wp-gpios: true
+
+ address-width:
+ description:
+ Number of address bits.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 8
+ enum: [ 8, 16 ]
+
+ num-addresses:
+ description:
+ Total number of i2c slave addresses this device takes.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 1
+ minimum: 1
+ maximum: 8
+
+ vcc-supply:
+ description:
+ phandle of the regulator that provides the supply voltage.
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@52 {
+ compatible = "microchip,24c32", "atmel,24c32";
+ reg = <0x52>;
+ pagesize = <32>;
+ wp-gpios = <&gpio1 3 0>;
+ num-addresses = <8>;
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml
new file mode 100644
index 000000000..bb78e12b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/eeprom/at25.yaml
@@ -0,0 +1,159 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/eeprom/at25.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SPI EEPROMs or FRAMs compatible with Atmel's AT25
+
+maintainers:
+ - Christian Eggers <ceggers@arri.de>
+
+properties:
+ $nodename:
+ anyOf:
+ - pattern: "^eeprom@[0-9a-f]{1,2}$"
+ - pattern: "^fram@[0-9a-f]{1,2}$"
+
+ # There are multiple known vendors who manufacture EEPROM chips compatible
+ # with Atmel's AT25. The compatible string requires two items where the
+ # 'vendor' and 'model' parts of the first are the actual chip and the second
+ # item is fixed to "atmel,at25". Some existing bindings only have the
+ # "atmel,at25" part and should be fixed by somebody who knows vendor and
+ # product.
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - anvo,anv32c81w
+ - anvo,anv32e61w
+ - atmel,at25256B
+ - fujitsu,mb85rs1mt
+ - fujitsu,mb85rs256
+ - fujitsu,mb85rs64
+ - microchip,25aa010a
+ - microchip,at25160bn
+ - microchip,25lc040
+ - st,m95m02
+ - st,m95256
+ - st,m95640
+ - cypress,fm25
+
+ - const: atmel,at25
+
+ # Please don't use this alternative for new bindings.
+ - items:
+ - const: atmel,at25
+
+ reg:
+ maxItems: 1
+
+ pagesize:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072]
+ description:
+ Size of the eeprom page. FRAMs don't have pages.
+
+ size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Total eeprom size in bytes.
+ Also used for FRAMs without device ID where the size cannot be detected.
+
+ address-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 8, 9, 16, 24 ]
+ description:
+ Number of address bits.
+ For 9 bits, the MSB of the address is sent as bit 3 of the instruction
+ byte, before the address byte.
+
+ spi-cpha: true
+
+ spi-cpol: true
+
+ read-only:
+ description:
+ Disable writes to the eeprom.
+ type: boolean
+
+ wp-gpios:
+ maxItems: 1
+ description:
+ GPIO to which the write-protect pin of the chip is connected.
+
+ # Deprecated: at25,byte-len, at25,addr-mode, at25,page-size
+ at25,byte-len:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Total eeprom size in bytes. Deprecated, use "size" property instead.
+ deprecated: true
+
+ at25,addr-mode:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Addr-mode flags, as defined in include/linux/spi/eeprom.h.
+ Deprecated, use "address-width" property instead.
+ deprecated: true
+
+ at25,page-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Size of the eeprom page. Deprecated, use "pagesize" property instead.
+ deprecated: true
+
+required:
+ - compatible
+ - reg
+ - spi-max-frequency
+
+allOf:
+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
+ - $ref: /schemas/nvmem/nvmem.yaml
+ - if:
+ properties:
+ compatible:
+ not:
+ contains:
+ const: cypress,fm25
+ then:
+ required:
+ - pagesize
+ - size
+ - address-width
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@0 {
+ compatible = "st,m95256", "atmel,at25";
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ spi-cpha;
+ spi-cpol;
+ wp-gpios = <&gpio1 3 0>;
+
+ pagesize = <64>;
+ size = <32768>;
+ address-width = <16>;
+ };
+
+ fram@1 {
+ compatible = "cypress,fm25", "atmel,at25";
+ reg = <1>;
+ spi-max-frequency = <40000000>;
+ };
+
+ fram@2 {
+ compatible = "cypress,fm25", "atmel,at25";
+ reg = <2>;
+ spi-max-frequency = <20000000>;
+ size = <2048>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml b/Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml
new file mode 100644
index 000000000..144e86ce5
--- /dev/null
+++ b/Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/eeprom/microchip,93lc46b.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip 93xx46 SPI compatible EEPROM family
+
+maintainers:
+ - Cory Tusar <cory.tusar@pid1solutions.com>
+
+properties:
+ compatible:
+ enum:
+ - atmel,at93c46
+ - atmel,at93c46d
+ - atmel,at93c56
+ - atmel,at93c66
+ - eeprom-93xx46
+ - microchip,93lc46b
+
+ data-size:
+ description: number of data bits per word
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [8, 16]
+
+ reg:
+ description: chip select of EEPROM
+ maxItems: 1
+
+ read-only:
+ description:
+ parameter-less property which disables writes to the EEPROM
+ type: boolean
+
+ select-gpios:
+ description:
+ specifies the GPIO that needs to be asserted prior to each access
+ of EEPROM (e.g. for SPI bus multiplexing)
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - data-size
+ - spi-max-frequency
+
+allOf:
+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
+ - $ref: /schemas/nvmem/nvmem.yaml
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@0 {
+ compatible = "eeprom-93xx46";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ data-size = <8>;
+ select-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/eeprom/st,m24lr.yaml b/Documentation/devicetree/bindings/eeprom/st,m24lr.yaml
new file mode 100644
index 000000000..0a0820e9d
--- /dev/null
+++ b/Documentation/devicetree/bindings/eeprom/st,m24lr.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/eeprom/st,m24lr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics M24LR NFC/RFID EEPROM
+
+maintainers:
+ - Abd-Alrhman Masalkhi <abd.masalkhi@gmail.com>
+
+description:
+ STMicroelectronics M24LR series are dual-interface (RF + I2C)
+ EEPROM chips. These devices support I2C-based access to both
+ memory and a system area that controls authentication and configuration.
+ They expose two I2C addresses, one for the system parameter sector and
+ one for the EEPROM.
+
+allOf:
+ - $ref: /schemas/nvmem/nvmem.yaml#
+
+properties:
+ compatible:
+ enum:
+ - st,m24lr04e-r
+ - st,m24lr16e-r
+ - st,m24lr64e-r
+
+ reg:
+ items:
+ - description: I2C address used for control/system registers
+ - description: I2C address used for EEPROM memory access
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@57 {
+ compatible = "st,m24lr04e-r";
+ reg = <0x57>, /* primary-device */
+ <0x53>; /* secondary-device */
+ };
+ };
+...