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authorFan Wu <fanwu01@zju.edu.cn>2026-08-20 13:53:06 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-09-01 16:50:04 +0200
commit263f7d61a4201cde16849b2d016251806e7418be (patch)
tree861df7c5b878b85741cf319ece81111b4c41c3b1 /Documentation/devicetree/bindings/chrome
downloadlinux-stable-263f7d61a4201cde16849b2d016251806e7418be.tar.gz
linux-stable-263f7d61a4201cde16849b2d016251806e7418be.zip
usb: typec: qcom-pmic-typec: disable cc_debounce_dwork on stopgrafted
cc_debounce_dwork is queued from the set_cc() and start_toggling() callbacks, which run from TCPM's kthread worker. port_stop() returns before tcpm_unregister_port() destroys that worker. Flushing the worker during unregister may therefore run a callback which queues the delayed work after port_stop() has returned. The delayed work can then run after devres has freed pmic_typec_port. Use disable_delayed_work_sync() in port_stop() to cancel a pending instance and prevent the TCPM callbacks from queueing another one. This issue was found by an in-house static analysis tool. Fixes: a4422ff22142 ("usb: typec: qcom: Add Qualcomm PMIC Type-C driver") Cc: stable <stable@kernel.org> # v6.10+ Assisted-by: Codex:gpt-5.6 Signed-off-by: Fan Wu <fanwu01@zju.edu.cn> Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Link: https://patch.msgid.link/20260820135307.153773-2-fanwu01@zju.edu.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/chrome')
-rw-r--r--Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml77
1 files changed, 77 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
new file mode 100644
index 000000000..fd1a45987
--- /dev/null
+++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/chrome/google,cros-ec-typec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Google Chrome OS EC(Embedded Controller) Type C port driver.
+
+maintainers:
+ - Benson Leung <bleung@chromium.org>
+ - Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
+ - Andrei Kuchynski <akuchynski@chromium.org>
+ - Ɓukasz Bartosik <ukaszb@chromium.org>
+ - Jameson Thies <jthies@google.com>
+
+description:
+ Chrome OS devices have an Embedded Controller(EC) which has access to
+ Type C port state. This node is intended to allow the host to read and
+ control the Type C ports. This binding is compatible with both the
+ cros-ec-typec and cros-ec-ucsi drivers. The cros-ec-typec driver
+ supports the host command interface used by the Chrome OS EC with a
+ built-in Type-C port manager and external Type-C Port Controller
+ (TCPC). The cros-ec-ucsi driver supports the USB Type-C Connector
+ System Software (UCSI) interface used by the Chrome OS EC when the
+ platform has a separate power delivery controller (PDC). The node for
+ this device should be under a cros-ec node like google,cros-ec-spi.
+
+properties:
+ compatible:
+ enum:
+ - google,cros-ec-typec
+ - google,cros-ec-ucsi
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+patternProperties:
+ '^connector@[0-9a-f]+$':
+ $ref: /schemas/connector/usb-connector.yaml#
+ required:
+ - reg
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cros_ec: ec@0 {
+ compatible = "google,cros-ec-spi";
+ reg = <0>;
+ interrupts = <35 0>;
+
+ typec {
+ compatible = "google,cros-ec-typec";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+ try-power-role = "source";
+ };
+ };
+ };
+ };