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| author | Yijie Yang <yijie.yang@oss.qualcomm.com> | 2026-08-11 16:46:47 +0800 |
|---|---|---|
| committer | Rob Herring (Arm) <robh@kernel.org> | 2026-08-15 15:46:52 -0500 |
| commit | e1c13aed4a1641550e8c9518c96f016e1d52d09b (patch) | |
| tree | 61c2297688373db165cc857b7c7adcb147a5c419 /Documentation/ABI/testing/sysfs-devices-mapping | |
| download | linux-stable-e1c13aed4a1641550e8c9518c96f016e1d52d09b.tar.gz linux-stable-e1c13aed4a1641550e8c9518c96f016e1d52d09b.zip | |
dt-bindings: interconnect: qcom-bwmon: Add Maili cpu-bwmon compatiblegrafted
Add the Qualcomm Maili SoC compatible string for the CPU bandwidth
monitor (BWMONv4). This falls back to the sdm845-bwmon compatible,
consistent with the existing pattern used by other recent SoCs such as
sm8750 and kaanapali.
Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Link: https://patch.msgid.link/20260811-bwmon-v2-1-80f7f150ab9e@oss.qualcomm.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Diffstat (limited to 'Documentation/ABI/testing/sysfs-devices-mapping')
| -rw-r--r-- | Documentation/ABI/testing/sysfs-devices-mapping | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-devices-mapping b/Documentation/ABI/testing/sysfs-devices-mapping new file mode 100644 index 000000000..2eee1446a --- /dev/null +++ b/Documentation/ABI/testing/sysfs-devices-mapping @@ -0,0 +1,62 @@ +What: /sys/devices/uncore_iio_x/dieX +Date: February 2020 +Contact: Alexander Antonov <alexander.antonov@linux.intel.com> +Description: + Each IIO stack (PCIe root port) has its own IIO PMON block, so + each dieX file (where X is die number) holds "Segment:Root Bus" + for PCIe root port, which can be monitored by that IIO PMON + block. + For example, on 4-die Xeon platform with up to 6 IIO stacks per + die and, therefore, 6 IIO PMON blocks per die, the mapping of + IIO PMON block 0 exposes as the following:: + + $ ls /sys/devices/uncore_iio_0/die* + -r--r--r-- /sys/devices/uncore_iio_0/die0 + -r--r--r-- /sys/devices/uncore_iio_0/die1 + -r--r--r-- /sys/devices/uncore_iio_0/die2 + -r--r--r-- /sys/devices/uncore_iio_0/die3 + + $ tail /sys/devices/uncore_iio_0/die* + ==> /sys/devices/uncore_iio_0/die0 <== + 0000:00 + ==> /sys/devices/uncore_iio_0/die1 <== + 0000:40 + ==> /sys/devices/uncore_iio_0/die2 <== + 0000:80 + ==> /sys/devices/uncore_iio_0/die3 <== + 0000:c0 + + Which means:: + + IIO PMU 0 on die 0 belongs to PCI RP on bus 0x00, domain 0x0000 + IIO PMU 0 on die 1 belongs to PCI RP on bus 0x40, domain 0x0000 + IIO PMU 0 on die 2 belongs to PCI RP on bus 0x80, domain 0x0000 + IIO PMU 0 on die 3 belongs to PCI RP on bus 0xc0, domain 0x0000 + +What: /sys/devices/uncore_upi_x/dieX +Date: March 2022 +Contact: Alexander Antonov <alexander.antonov@linux.intel.com> +Description: + Each /sys/devices/uncore_upi_X/dieY file holds "upi_Z,die_W" + value that means UPI link number X on die Y is connected to UPI + link Z on die W and this link between sockets can be monitored + by UPI PMON block. + For example, 4-die Sapphire Rapids platform has the following + UPI 0 topology:: + + # tail /sys/devices/uncore_upi_0/die* + ==> /sys/devices/uncore_upi_0/die0 <== + upi_1,die_1 + ==> /sys/devices/uncore_upi_0/die1 <== + upi_0,die_3 + ==> /sys/devices/uncore_upi_0/die2 <== + upi_1,die_3 + ==> /sys/devices/uncore_upi_0/die3 <== + upi_0,die_1 + + Which means:: + + UPI link 0 on die 0 is connected to UPI link 1 on die 1 + UPI link 0 on die 1 is connected to UPI link 0 on die 3 + UPI link 0 on die 2 is connected to UPI link 1 on die 3 + UPI link 0 on die 3 is connected to UPI link 0 on die 1
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