// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Device Tree Source for the PIC64GX Curiosity Kit * * Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries * * Author: Pierre-Henry Moussay * * The Curiosity-GX10000 (PIC64GX SoC Curiosity Kit) is a compact SoC * prototyping board featuring a Microchip PIC64GX SoC * PIC64GX-1000. Features include: * - 1 GB DDR4 SDRAM * - Gigabit Ethernet * - microSD-card slot * * https://www.microchip.com/en-us/development-tool/curiosity-pic64gx1000-kit-es */ /dts-v1/; #include "pic64gx.dtsi" #include "pic64gx-pinctrl.dtsi" /* Clock frequency (in Hz) of the rtcclk */ #define RTCCLK_FREQ 1000000 / { #address-cells = <2>; #size-cells = <2>; model = "Microchip PIC64GX Curiosity Kit"; compatible = "microchip,pic64gx-curiosity-kit", "microchip,pic64gx"; aliases { ethernet0 = &mac0; serial1 = &mmuart1; serial2 = &mmuart2; }; chosen { stdout-path = "serial1:115200n8"; }; cpus { timebase-frequency = ; }; memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x40000000>; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; hss: hss-buffer@bfc00000 { compatible = "shared-dma-pool"; reg = <0x0 0xbfc00000 0x0 0x400000>; no-map; }; }; }; &gpio0 { status ="okay"; gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "MIPI_CAM_RESET", "MIPI_CAM_STANDBY"; }; &gpio1 { status ="okay"; gpio-line-names = "", "", "LED1", "LED2", "LED3", "LED4", "LED5", "LED6", "LED7", "LED8", "", "", "", "", "", "", "", "", "", "", "HDMI_HPD", "", "", "GPIO_1_23"; }; &gpio2 { pinctrl-names = "default"; pinctrl-0 = <&mdio1_gpio>, <&spi0_gpio>, <&can0_gpio>, <&pcie_gpio>, <&qspi_gpio>, <&uart3_gpio>, <&uart4_gpio>, <&can1_gpio>; status ="okay"; gpio-line-names = "", "", "", "", "", "", "SWITCH2", "USR_IO12", "DIP1", "DIP2", "", "DIP3", "USR_IO1", "USR_IO2", "USR_IO7", "USR_IO8", "USR_IO3", "USR_IO4", "USR_IO5", "USR_IO6", "", "", "USR_IO9", "USR_IO10", "DIP4", "USR_IO11", "", "", "SWITCH1", "", "", ""; }; &i2c0 { status = "okay"; }; &i2c1 { status = "okay"; }; &irqmux { interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>, <3 &plic 16>, <4 &plic 17>, <5 &plic 18>, <6 &plic 19>, <7 &plic 20>, <8 &plic 21>, <9 &plic 22>, <10 &plic 23>, <11 &plic 24>, <12 &plic 25>, <13 &plic 26>, <32 &plic 27>, <33 &plic 28>, <34 &plic 29>, <35 &plic 30>, <36 &plic 31>, <37 &plic 32>, <38 &plic 33>, <39 &plic 34>, <40 &plic 35>, <41 &plic 36>, <42 &plic 37>, <43 &plic 38>, <44 &plic 39>, <45 &plic 40>, <46 &plic 41>, <47 &plic 42>, <48 &plic 43>, <49 &plic 44>, <50 &plic 45>, <51 &plic 46>, <52 &plic 47>, <53 &plic 48>, <54 &plic 49>, <55 &plic 50>, <64 &plic 53>, <65 &plic 53>, <66 &plic 53>, <67 &plic 53>, <68 &plic 53>, <69 &plic 53>, <70 &plic 53>, <71 &plic 53>, <72 &plic 53>, <73 &plic 53>, <74 &plic 53>, <75 &plic 53>, <76 &plic 53>, <77 &plic 53>, <78 &plic 53>, <79 &plic 53>, <80 &plic 53>, <81 &plic 53>, <82 &plic 53>, <83 &plic 53>, <84 &plic 53>, <85 &plic 53>, <86 &plic 53>, <87 &plic 53>, <88 &plic 53>, <89 &plic 53>, <90 &plic 53>, <91 &plic 53>, <92 &plic 53>, <93 &plic 53>, <94 &plic 53>, <95 &plic 53>; }; &mac0 { status = "okay"; phy-mode = "sgmii"; phy-handle = <&phy0>; pinctrl-names = "default"; pinctrl-0 = <&mdio0_default>; phy0: ethernet-phy@b { reg = <0xb>; }; }; &mbox { status = "okay"; }; &mmc { bus-width = <4>; disable-wp; cap-sd-highspeed; cap-mmc-highspeed; sdhci-caps-mask = <0x00000007 0x00000000>; status = "okay"; }; &mmuart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_fio>; status = "okay"; }; &mmuart2 { pinctrl-names = "default"; pinctrl-0 = <&uart2_default>; status = "okay"; }; &refclk { clock-frequency = <125000000>; }; &rtc { status = "okay"; };