// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2026 Amlogic, Inc. All rights reserved.
 */

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>

/ {
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x0>;
			enable-method = "psci";
		};

		cpu1: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x100>;
			enable-method = "psci";
		};

		cpu2: cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x200>;
			enable-method = "psci";
		};

		cpu3: cpu@300 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x300>;
			enable-method = "psci";
		};

		cpu4: cpu@400 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x400>;
			enable-method = "psci";
		};

		cpu5: cpu@500 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x500>;
			enable-method = "psci";
		};

		cpu6: cpu@600 {
			device_type = "cpu";
			compatible = "arm,cortex-a78";
			reg = <0x0 0x600>;
			enable-method = "psci";
		};

		cpu7: cpu@700 {
			device_type = "cpu";
			compatible = "arm,cortex-a78";
			reg = <0x0 0x700>;
			enable-method = "psci";
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	xtal: xtal-clk {
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "xtal";
		#clock-cells = <0>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		apb: bus@fe000000 {
			compatible = "simple-bus";
			reg = <0x0 0xfe000000 0x0 0x480000>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;

			periphs_pinctrl: pinctrl@4000 {
				compatible = "amlogic,pinctrl-a9";
				#address-cells = <2>;
				#size-cells = <2>;
				ranges = <0x0 0x0 0x0 0x4000 0x0 0x340>;

				gpioz: gpio@c0 {
					reg = <0 0xc0 0 0x20>, <0 0x18 0 0x8>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>;
				};

				gpiox: gpio@100 {
					reg = <0 0x100 0 0x24>, <0 0xc 0 0x8>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 18>;
				};

				gpioh: gpio@140 {
					reg = <0 0x140 0 0x20>, <0 0x2c 0 0x4>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 8>;
				};

				gpiom: gpio@1a0 {
					reg = <0 0x1a0 0 0x20>, <0 0x20 0 0x4>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_M<<8) 8>;
				};

				gpiob: gpio@240 {
					reg = <0 0x240 0 0x20>, <0 0x0 0 0x8>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
				};

				gpioa: gpio@280 {
					reg = <0 0x280 0 0x24>, <0 0x40 0 0xc>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_A<<8) 20>;
				};

				gpioy: gpio@2c0 {
					reg = <0 0x2c0 0 0x20>, <0 0x30 0 0x8>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Y<<8) 10>;
				};

				gpiocc: gpio@300 {
					reg = <0 0x300 0 0x20>, <0 0x14 0 0x4>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
				};
			};

			gpio_intc: interrupt-controller@4080 {
				compatible = "amlogic,a9-gpio-intc",
					     "amlogic,meson-gpio-intc";
				reg = <0x0 0x4080 0x0 0x20>;
				interrupt-controller;
				#interrupt-cells = <2>;
				amlogic,channel-interrupts =
					<10 11 12 13 14 15 16 17 18 19 20 21>;
			};
		};

		gic: interrupt-controller@ff800000 {
			compatible = "arm,gic-v3";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x0 0xff800000 0 0x10000>,
			      <0x0 0xff840000 0 0x100000>;
			interrupts = <GIC_PPI 9 0xf04>;
		};

		aobus: bus@ffa00000 {
			compatible = "simple-bus";
			reg = <0x0 0xffa00000 0x0 0x100000>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x0 0x0 0xffa00000 0x0 0x100000>;

			aobus_pinctrl: pinctrl@4000 {
				compatible = "amlogic,pinctrl-a9";
				#address-cells = <2>;
				#size-cells = <2>;
				ranges = <0x0 0x0 0x0 0x4000 0x0 0x0e0>;

				gpioao: gpio@1c {
					reg = <0 0x1c 0 0x20>, <0 0x0 0 0x8>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&aobus_pinctrl 0 (AMLOGIC_GPIO_AO<<8) 13>;
				};

				gpioc: gpio@3c {
					reg = <0 0x3c 0 0x20>, <0 0x10 0 0x4>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&aobus_pinctrl 0 (AMLOGIC_GPIO_C<<8) 7>;
				};

				gpiod: gpio@5c {
					reg = <0 0x5c 0 0x24>, <0 0x8 0 0x8>;
					reg-names = "gpio", "mux";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&aobus_pinctrl 0 (AMLOGIC_GPIO_D<<8) 18>;
				};

				test_n: gpio@c0 {
					reg = <0 0xc0 0 0x20>;
					reg-names = "gpio";
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&aobus_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
				};
			};

			gpio_ao_intc: interrupt-controller@4080 {
				compatible = "amlogic,a9-gpio-ao-intc",
					     "amlogic,meson-gpio-intc";
				reg = <0x0 0x4080 0x0 0x34>;
				interrupt-controller;
				#interrupt-cells = <2>;
				amlogic,channel-interrupts =
					<384 385 386 387 388 389 390 391 392 393
					394 395 396 397 398 399 400 401 402 403>;
			};

			uart_b: serial@1e000 {
				compatible = "amlogic,a9-uart",
					     "amlogic,meson-s4-uart";
				reg = <0x0 0x1e000 0x0 0x18>;
				interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
				clocks = <&xtal>, <&xtal>, <&xtal>;
				clock-names = "xtal", "pclk", "baud";
				status = "disabled";
			};
		};
	};
};